CONFIDENTIAL & PROPRIETARY

HM10S604 PRELIMINARY SPEC




Electrical characteristics over recommended operating conditions

Parameter

High level

input voltage

-

Test Conditions

V

Unit

Dx0~ Dx5,DCLK,

LOAD,RVRS1,RVRS2

DEIO1,DEIO2,

L/R,POLC,LP,BC

0.7VDD1

VDD1

MIN

TYP

MAX

Low level

input voltage

-

V

Dx0~ Dx5,DCLK,

LOAD,RVRS1,RVRS2

DEIO1,DEIO2,L/R,

POLC,LP,BC

0

0.3VDD1

Input leakage

current

-

uA

Dx0~ Dx5,DCLK,

LOAD,RVRS1,RVRS2

DEIO1,DEIO2,L/R,

POLC,LP,BC

10

Output

current

(Note 4)

Vx = VDD2 - 0.2 V

VO = Vx - 1.0 V

uA

OUT1 ~ OUT420

-110

Vx = VSS2+ 0.2 V

VO = Vx + 1.0 V

110

Deviation between

output voltage pins

(Note 5)

VSS + 0.2 ~

VDD2 - 0.2

mV

OUT1 ~ OUT420

10

Average output

variation (Note 6)

-

mV

OUT1 ~ OUT420

10

Resistance

between reference

power supplies

-



GH63 ~ GH0

GL0 ~ GL63

14,392

Supply current

(during operation)

LOAD interval = 20us

fclk = 36 MHz, No load

VDD2=8.0V

Black raster pattern

GH63 =7.8 V

GL63 = 0.2 V

uA

Analog section

TBD

Supply current

(during standby)

No load, VDD2=8V

Black raster pattern

GH63 =7.8 V

GL63 = 0.2 V

Clock and input signal

are in the stop state

uA

TBD

Supply current

(during operation)

LOAD interval = 20us

fclk = 36 MHz,

Checked dot test

pattern

uA

Digital section

TBD

Clock and input signal

are in the stop state

uA

TBD

Notes : 4. Vx is the output voltage of OUT1 ~ OUT420. Vo is the voltage impressed at OUT1 ~ OUT420.

5.This is the deviation between terminals with differences in positive and negative amplitude,

when all chip outputs display the same data.

6. This is the inter-chip deviation in the average of the output voltage inter-pin deviation

Supply current

(during standby)

V

AV

Vo

VIH

VIL