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ICS1893 Datasheet(PDF) 118 Page - Integrated Circuit Systems |
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ICS1893 Datasheet(HTML) 118 Page - Integrated Circuit Systems |
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118 / 152 page ![]() ICS1893 Rev C 6/6/00 June, 2000 118 Chapter 9 Pin Diagram, Listings, and Descriptions ICS1893 Data Sheet - Release Copyright © 2000, Integrated Circuit Systems, Inc. All rights reserved. RXD0, RXD1, RXD2, RXD3 SRD0, SRD1, SRD2, SRD3 35, 34, 33, 32 Output Symbol Receive Data 0–3. In 100M Symbol mode: • The ICS1893’s SRD0 pin transmits the least-significant bit and the SRD4 pin transmits the most-significant bit of the symbol received from its MAC/Repeater interface. • The ICS1893 continually transfers the data it receives from its MDI to its SRD[4:0] pins (that is, to its MAC/Repeater Interface). In the 100M Symbol mode, data is not framed. Therefore, the ICS1893 does not assert its RXDV signal. • The ICS1893 transfers its receive data to the SRD[4:0] pins synchronously on the rising edges of its SRCLK signal. Note: The signal on the ICS1893’s SRD[3:0] pins are conditioned by the RXTRI pin. RXDV – 36 No Connect Receive Data Valid. For the 100M Symbol Interface, this pin is a no connect. For more information, see Table 6-1. RXER SRD4 39 Output Symbol Receive Data 4. This pin’s description is the same as that given in Table 9-5. RXTRI 41 Input Receive (Interface), Tri-State. This pin’s input is from a MAC. When this pin’s signal is logic: • Low, the MAC indicates it is not in a tri-state condition. • High, the MAC indicates it is in a tri-state condition. In this case, the ICS1893 acts to ensure that only one PHY is active at a time. (A PHY address of 00 also tri-states the MII interface.) TXCLK STCLK 43 Output Symbol Transmit Clock. This pin’s description is the same as that given in Table 9-5. TXD0–3 STD0, STD1, STD2, STD3 45, 46, 47, 48 Input Symbol Transmit Data 0–3. In 100M Symbol mode: • The ICS1893 STD0 pin receives the least-significant bit and the STD4 pin receives the most-significant bit of the symbol received from the MAC/Repeater interface. • The signals on the ICS1893 STD[4:0] pins are continually and synchronously sampled on the rising edges of its STCLK. These signals are independent of the TXEN signal. Note: In 100M Symbol mode, TXEN is not used because the MAC/Repeater is responsible for sending both IDLE symbols and data. TXEN – 44 No Connect Transmit Enable. For the 100M Symbol Interface, this pin is a no connect. For more information, see Table 6-1. TXER STD4 42 Input Symbol Transmit Data 4. This pin’s description is the same as that given in Table 9-5. Table 9-6. MAC/Repeater Interface Pins: 100M Symbol Interface (Continued) MII Pin Name 100M Symbol Pin Name Pin No. Pin Type Pin Description |
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