ICS1893 datasheet(93/152 Pages) ICST

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Chapter 8

Management Register Set

ICS1893 Rev C 6/6/00

June, 2000

ICS1893 - Release

8.12.3

Auto-Negotiation Progress Monitor (bits 17.13:11)

The Auto-Negotiation Progress Monitor consists of the Auto-Negotiation Complete bit (bit 17.4) and the

three Auto-Negotiation Monitor bits (bits 17.13:11). The Auto-Negotiation Progress Monitor continually

examines the state of the Auto-Negotiation Process State Machine and reports the status of

Auto-Negotiation using the three Auto-Negotiation Monitor bits. Therefore, the value of these three bits

provides the status of the Auto-Negotiation Process.

These three bits are initialized to logic zero in one of the following ways:

• A reset (see Section 5.1, “Reset Operations”)

• Disabling Auto-Negotiation [see Section 8.2.4, “Auto-Negotiation Enable (bit 0.12)”]

• Restarting Auto-Negotiation [see Section 8.2.7, “Restart Auto-Negotiation (bit 0.9)”]

If Auto-Negotiation is enabled, these bits continually latch the highest state that the Auto-Negotiation State

Machine achieves. That is, they are updated only if the binary value of the next state is greater than the

binary value of the present state as outlined in Table 8-19.

Note:

An MDIO read of these bits provides a history of the greatest progress achieved by the

auto-negotiation process. In addition, the MDIO read latches the present state of the

Auto-Negotiation State Machine for a subsequent read.

8.12.4

100Base-TX Receive Signal Lost (bit 17.10)

The 100Base-TX Receive Signal Lost bit indicates to an STA whether the ICS1893 has lost its 100Base-TX

Receive Signal. If this bit is set to a logic:

• Zero, it indicates the Receive Signal has remained valid since either the last read or reset of this register.

• One, it indicates the Receive Signal was lost since either the last read or reset of this register.

This bit is a latching high bit. (For more information on latching high and latching low bits, see Section

8.1.4.1, “Latching High Bits”and Section 8.1.4.2, “Latching Low Bits”.)

Note:

This bit has no definition in 10Base-T mode.

Table 8-19.

Auto-Negotiation State Machine (Progress Monitor)

Auto-Negotiation State Machine

Auto-Negotiation Progress Monitor

Auto-

Negotiation

Complete Bit

(Bit 17.4)

Auto-

Negotiation

Monitor Bit 2

(Bit 17.13)

Auto-

Negotiation

Monitor Bit 1

(Bit 17.12)

Auto-

Negotiation

Monitor Bit 0

(Bit 17.11)

Idle

Parallel Detected

Parallel Detection Failure

Ability Matched

Acknowledge Match Failure

Acknowledge Matched

Consistency Match Failure

Consistency Matched

Auto-Negotiation Completed

Successfully

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