ICS1893 datasheet(106/152 Pages) ICST

106 / 152 page

ICS1893 Rev C 6/6/00

June, 2000

106

Chapter 9

Pin Diagram, Listings, and Descriptions

ICS1893 Data Sheet - Release

9.3.2

Multi-Function (Multiplexed) Pins: PHY Address and LED Pins

Table 9-3 lists the pins for the multi-function group of pins (that is, the multiplexed PHY Address / LED

pins).

Note:

During either a power-on reset or a hardware reset, each multi-function configuration pin is an input

that is sampled when the ICS1893 exits the reset state. After sampling is complete, these pins are

output pins that can drive status LEDs.

A software reset does not affect the state of a multi-function configuration pin. During a software reset,

all multi-function configuration pins are outputs.

Each multi-function configuration pin must be pulled either up or down with a resistor to establish the

address of the ICS1893. LEDs placed in series with these resistors provide a designated status

indicator.

Caution:

All pins listed in Table 9-3 must not float.

As outputs, the asserted state of a multi-function configuration pin is the inverse of the sense sampled

during reset. This inversion provides a signal that can illuminate an LED during an asserted state. For

example, if a multi-function configuration pin is pulled down to ground through an LED and a

current-limiting resistor, then the sampled sense of the input is low. To illuminate an LED for the

asserted state requires the output to be high.

Note:

Each of these pins monitor the data link by providing signals that directly drive LEDs.

Table 9-3.

PHY Address and LED Pins

Name

Number

Type

Pin Description

P0AC

Input or

Output

PHY (Address Bit) 0 / Activity LED.

For more information on this pin, see Section 6.8, “Status Interface”.

• This multi-function configuration pin is:

– An input pin during either a power-on reset or a hardware reset. In

this case, this pin configures the ICS1893 when it is in either

hardware mode or software mode.

– An output pin following reset. In this case, this pin provides link status

of the ICS1893.

As an input pin:

• This pin establishes the address for the ICS1893. When the signal on

this pin is logic:

– Low, that address bit is set to logic zero.

– High, that address bit is set to logic one.

As an output pin:

• When the signal on this pin is:

– De-asserted, this state indicates the ICS1893 does not have a link.

– Asserted, this state indicates the ICS1893 has a valid link.

Caution:

This pin must not float. (See the notes at Section 9.3.2,

“Multi-Function (Multiplexed) Pins: PHY Address and LED

Pins”.)

ICS1893 Datasheet(PDF) 106 Page - Integrated Circuit Systems

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