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ICS9148-47 Datasheet(PDF) 4 Page - Integrated Circuit Systems

Part # ICS9148-47
Description  Pentium/ProTM System Clock Chip
PDF  9 Pages
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Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS9148-47 Datasheet(HTML) 4 Page - Integrated Circuit Systems

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4
ICS9148-47
Note: PWD = Power-Up Default
Byte 3: Functionality & Frequency Select
& Spread Slect Register
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Bit
Description
PWD
7(Reserved)
0
6:4
Bit
654
CPU
PCI
Spread
Percentage
000
001
010
011
100
101
110
111
68.5
75.0
83.3
66.6
103
112
133.3
100
34.25
37.5
41.6
33.3
34.3
37.3
44.43
33.33
±0.5% Center
±0.5% Center
±0.5% Center
±0.5% Center
±0.5% Center
±0.5% Center
±0.5% Center
±0.5% Center
0
3
0 - Frequency is selected by hardware select
SEL100/66.6#
1 - Frequency is selected by 6:4 above
0
2(Reserved)
10
00 - Normal operation
01 - Test mode
10 - Spread sprectrum ON
11 - Tristate all outputs
00
Byte 4:
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Bit
Pin#
Pin Name
PWD
Description
Bit Value = 0
Bit Value = 1
7
-
-
-
(Reserved)
(Reserved)
6
-
-
-
(Reserved)
(Reserved)
5
-
-
-
(Reserved)
(Reserved)
4
-
-
-
(Reserved)
(Reserved)
3
-
-
-
(Reserved)
(Reserved)
221
CPUCLK1
1
Disabled
(low)
Enabled
1
-
-
0
(Reserved)
(Reserved)
022
CPUCLK0
1
(Disabled)
(low)
Enabled
Byte 5:
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Bit
Pin#
Pin Name
PWD
Description
Bit Value = 0
Bit Value = 1
74
PCICLK_F
1
Disabled
(low)
Enabled
6
11
PCICLK5
1
Disabled
(low)
Enabled
5
10
PCICLK4
1
Disabled
(low)
Enabled
4
-
-
0
(Reserved)
(Reserved)
38
PCICLK3
1
Disabled
(low)
Enabled
27
PCICLK2
1
Disabled
(low)
Enabled
16
PCICLK1
1
Disabled
(low)
Enabled
05
PCICLK0
1
Disabled
(low)
Enabled
Serial Bitmap
Byte 6:
Notes:
1 = Enabled; 0 = Disabled, outputs held low
For pin 27, there are 2 output stages together for 1 pin. These 2
latches must be both 0 or 1 simultaneously or there will be a short to
ground if one is disabled and the other is running.
Bit
Pin#
Pin Name
PWD
Description
Bit Value = 0
Bit Value = 1
7
-
-
0
(Reserved)
(Reserved)
6
-
-
0
(Reserved)
(Reserved)
524
IOAPIC
1
Disabled
(low)
Enabled
4
-
-
0
(Reserved)
(Reserved)
3
-
-
0
(Reserved)
(Reserved)
2
-
-
0
(Reserved)
(Reserved)
127
REF0
1
(Disabled)
(low)
Enabled
027
REF0
1
(Disabled)
(low)
Enabled



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