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ICS9148-93 Datasheet(PDF) 1 Page - Integrated Circuit Systems

Part # ICS9148-93
Description  Frequency Generator & Integrated Buffers for PENTIUM/ProTM
PDF  14 Pages
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Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS9148-93 Datasheet(HTML) 1 Page - Integrated Circuit Systems

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Integrated
Circuit
Systems, Inc.
General Description
Features
ICS9148-93
Advance Information
Block Diagram
Pentium is a trademark of Intel Corporation
I
2C is a trademark of Philips Corporation
Frequency Generator & Integrated Buffers for PENTIUM/ProTM
9148-93 Rev - 1/22/99
Pin Configuration
•
Generates the following system clocks:
-4CPU(2.5V/3.3V)upto100MHz.
-6PCI(3.3V)@ 33.3MHz
-2AGP(3.3V)@2x PCI
- 12 SDRAMs(3.3V) @ either CPU orAGP
-2REF(3.3V)@14.318MHz
•
Skew characteristics:
- CPU – CPU<250ps
- SDRAM – SDRAM < 250ps
- CPU – SDRAM < 250ps
- CPU(early) – PCI : 1-4ns
•
Supports Spread Spectrum modulation +0.25, ±0.6%
•
Serial I2C interface for Power Management, Frequency
Select, Spread Spectrum.
•
Efficient Power management scheme through PCI and CPU
STOPCLOCKS.
•
Uses external 14.318MHz crystal
•
48pin300milSSOP.
48-Pin SSOP
Power Groups
VDD1 = REF (0:1), X1, X2
VDD2 = PCICLK_F, PCICLK(0:5)
VDD3 = SDRAM (0:11), supply for PLL core,
24 MHz, 48MHz
VDD4=AGP(0:1)
VDDL=CPUCLK(0:3)
* Internal Pull-up Resistor of
240K to 3.3V on indicated inputs
The ICS9148-93 is the single chip clock solution for Desktop/
Notebook designs using the VIA MVP3 style chipset. It
provides all necessary clock signals for such a system.
Spread spectrum may be enabled through I2C programming.
Spread spectrum typically reduces system EMI by 8dB to
10dB. This simplifies EMI qualification without resorting to
board design iterations or costly shielding. The ICS9148-93
employs a proprietary closed loop design, which tightly
controls the percentage of spreading over process and
temperature variations.
Serial programming I2C interface allows changing functions,
stop clock programming and frequency selection. The SD_SEL
latched input allows the SDRAM frequency to follow the
CPUCLK frequency(SD_SEL=1) or the AGP clock
frequency(SD_SEL=0).
ADVANCE INFORMATION documents contain information on products
in the formative or design phase development. Characteristic data and
other specifications are design goals. ICS reserves the right to change or
discontinue these products without notice.


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