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80C186EC Datasheet(PDF) 45 Page - Intel Corporation |
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80C186EC Datasheet(HTML) 45 Page - Intel Corporation |
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45 / 57 page ![]() 80C186EC188EC 80L186EC188EC 272434 – 19 NOTES 1 Address information is invalid If previous bus cycle was a read then the AD150 (AD70) lines will float during T1 Otherwise the AD150 (AD70) lines will continue to drive during T1 (data is invalid) All other control lines are in their inactive state 2 All address lines drive zeros while in Powerdown or Idle Mode Pin names in parentheses apply to 80C188EC80L188EC Figure 20 Halt Cycle Waveforms 45 |
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