80C188EB13 datasheet(27/59 Pages) INTEL

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80C186EB80C188EB 80L186EB80L188EB

ICC VERSUS FREQUENCY AND VOLTAGE

The current (ICC) consumption of the processor is

essentially composed of two components IPD and

ICCS

IPD is the quiescent current that represents internal

device leakage and is measured with all inputs or

floating outputs at GND or VCC (no clock applied to

the device) IPD is equal to the Powerdown current

and is typically less than 50 mA

ICCS is the switching current used to charge and

discharge parasitic device capacitance when chang-

ing logic levels Since ICCS is typically much greater

than IPD IPD can often be ignored when calculating

ICC

ICCS is related to the voltage and frequency at which

the device is operating It is given by the formula

Power e V c I e V2 c CDEV c f

I e ICC e ICCS e V c CDEV c f

Where V e Device operating voltage (VCC)

CDEV e Device capacitance

f e Device operating frequency

ICCS e ICC e Device current

Measuring CDEV on a device like the 80C186EB

would be difficult Instead CDEV is calculated using

the above formula by measuring ICC at a known VCC

and frequency (see Table 11) Using this CDEV val-

ue ICC can be calculated at any voltage and fre-

quency within the specified operating range

EXAMPLE Calculate the typical ICC when operating

at 10 MHz 48V

ICC e ICCS e 48 c 0583 c 10

28 mA

PDTMR PIN DELAY CALCULATION

The PDTMR pin provides a delay between the as-

sertion of NMI and the enabling of the internal

clocks when exiting Powerdown A delay is required

only when using the on-chip oscillator to allow the

crystal or resonator circuit time to stabilize

NOTE

The PDTMR pin function does not apply when

RESIN is asserted (ie a device reset during Pow-

erdown is similar to a cold reset and RESIN must

remain active until after the oscillator has stabi-

lized)

To calculate the value of capacitor required to pro-

vide a desired delay use the equation

440 c t e CPD (5V 25 C)

Where t e desired delay in seconds

CPD e capacitive load on PDTMR in mi-

crofarads

EXAMPLE To get a delay of 300 ms a capacitor

value of CPD e 440 c (300 c 10b6) e 0132 mFis

required Round up to standard (available) capaci-

tive values

NOTE

The above equation applies to delay times greater

than 10 ms and will compute the TYPICAL capaci-

tance needed to achieve the desired delay A delay

variance of a50% or b25% can occur due to

temperature

voltage

and device process ex-

tremes In general higher VCC andor lower tem-

perature will decrease delay time while lower VCC

andor higher temperature will increase delay time

Table 11 Device Capacitance (CDEV) Values

Parameter

Typ

Max

Units

Notes

CDEV (Device in Reset)

0583

102

mAV MHz

1 2

CDEV (Device in Idle)

0408

0682

mAV MHz

1 2

1 Max CDEV is calculated at b40 C all floating outputs driven to VCC or GND and all

outputs loaded to 50 pF (including CLKOUT and OSCOUT)

2 Typical CDEV is calculated at 25 C with all outputs loaded to 50 pF except CLKOUT and

OSCOUT which are not loaded

80C188EB13 Datasheet(PDF) 27 Page - Intel Corporation

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