87C54 datasheet(4/20 Pages) INTEL

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AUTOMOTIVE 87C5487C54-20

PACKAGES

Part

Prefix

Package Type

87C54

40-Pin Plastic DIP

87C54

44-Pin PLCC

270849 – 2

DIP (PDIP)

270849 – 3

Do not connect reserved pins

PAD (PLCC)

Figure 3 Pin Connections

PIN DESCRIPTIONS

VCC Supply voltage

VSS Circuit ground

VSS1 Secondary ground (in PLCC only) Provided to

reduce ground bounce and improve power supply

by-passing

NOTE

This pin is not a substitute for the VSS pin (pin 22)

Port 0 Port 0 is an 8-bit open drain bidirectional IO

port As an output port each pin can sink several LS

TTL inputs Port 0 pins that have 1’s written to them

float and in that state can be used as high-imped-

ance inputs

Port 0 is also the multiplexed low-order address and

data bus during accesses to external Program and

Data Memory In this application it uses strong inter-

nal pullups when emitting1’s and can source and

sink several LS TTL inputs

Port 0 also receives the code bytes during EPROM

programming and outputs the code bytes during

program verification External pullup resistors are re-

quired during program verification

Port 1 Port 1 is an 8-bit bidirectional IO port with

internal pullups The Port 1 output buffers can drive

LS TTL inputs Port 1 pins that have 1’s written to

them are pulled high by the internal pullups and in

that state can be used as inputs As inputs Port 1

pins that are externally pulled low will source current

(IIL on the data sheet) because of the internal pull-

ups

In addition Port 1 serves the functions of the follow-

ing special features of the 87C54

Port Pin

Alternate Function

P10

T2 (External Count Input to Timer

Counter 2) Clock-Out

P11

T2EX (TimerCounter 2 Capture

Reload Trigger and Direction Control)

P12

ECI (External Count Input to the PCA)

P13

CEX0 (External IO for Compare

Capture Module 0)

P14

CEX1 (External IO for Compare

Capture Module 1)

P15

CEX2 (External IO for Compare

Capture Module 2)

P16

CEX3 (External IO for Compare

Capture Module 3)

P17

CEX4 (External IO for Compare

Capture Module 4)

Port 1 receives the low-order address bytes during

EPROM programming and verifying

Port 2 Port 2 is an 8-bit bidirectional IO port with

internal pullups The Port 2 output buffers can drive

LS TTL inputs Port 2 pins that have 1’s written to

them are pulled high by the internal pullups and in

that state can be used as inputs As inputs Port 2

pins that are externally pulled low will source current

(IIL on the data sheet) because of the internal pull-

ups

87C54 Datasheet(PDF) 4 Page - Intel Corporation

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