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8X930AX Datasheet(PDF) 1 Page - Intel Corporation |
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8X930AX Datasheet(HTML) 1 Page - Intel Corporation |
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1 / 38 page  ADVANCE INFORMATION COPYRIGHT © INTEL CORPORATION, 1997 February 1997 Order Number: 272917-003 8 x930Ax UNIVERSAL SERIAL BUS MICROCONTROLLER The 8 x930Ax USB microcontroller is based on an 8xC251Sx microcontroller core. It consists of standard 8 xC251Sx peripherals plus an added USB function. The 8x930Ax uses the standard instruction set of the MCS 251 architecture, which is binary code compatible with the MCS 51 architecture. The USB function integrates the USB transceiver, serial bus interface engine (SIE), function interface unit (FIU) and transmit/receive FIFOs. The USB function also supports full-speed/low-speed data rates, suspend/resume modes, isochronous/non-isochronous transfers, and is fully compliant with the USB rev 1.0 specification. s Complete Universal Serial Bus Specification 1.0 Compatibility — Supports Isochronous and Non-isochronous Data — Bidirectional Half-duplex Link s On-chip USB Transceiver s Serial Bus Interface Engine (SIE) — Packet Decoding/Generation — CRC Generation and Checking — NRZI Encoding/Decoding and Bit-stuffing s USB Reset Interrupt s Four Transmit FIFOs — Three 16-byte FIFOs — One Configurable FIFO (up to 1 Kbyte) s Four Receive FIFOs — Three 16-byte FIFOs — One Configurable FIFO (up to 1 Kbyte) s Automatic Transmit/Receive FIFO Management s Suspend/Resume Operation s Three New USB Interrupt Vectors — USB Function Interrupt — Start of Frame — Suspend/Resume s Phase-locked Loop — 12 Mbps or 1.5 Mbps Data Rate s Low Clock Mode s User-selectable Configurations — External Wait State — Address Range — Page Mode s Real-time Wait Function s 256-Kbyte External Code/Data Memory Space s On-chip ROM Options — 0, 8, or 16 Kbytes s 1 Kbyte On-chip Data RAM s Four Input/Output Ports — 1 Open-drain port — 3 Quasi-bidirectional Ports s Programmable Counter Array (PCA) — 5 Capture/Compare Modules s Serial I/O Port (UART) s Hardware Watchdog Timer s Three Flexible 16-bit Timer/Counters s Power-saving Idle and Powerdown Modes s Register-based MCS® 251 Architecture — 40-byte Register File — Registers Accessible as Bytes, Words, or Doublewords s Code Compatible with MCS 51 and MCS 251 Microcontrollers s 6 or 12 MHz Crystal Operation |
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