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M28F010 Datasheet(PDF) 17 Page - Intel Corporation |
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M28F010 Datasheet(HTML) 17 Page - Intel Corporation |
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17 / 22 page ![]() M28F010 AC CHARACTERISTICSWriteEraseProgram Operations(12) Versions M28F010-90 M28F010-12 M28F010-15 M28F010-20 M28F010-25 Unit Symbol Characteristic Min Max Min Max Min Max Min Max Min Max tAVAV tWC Write Cycle Time 90 120 150 200 250 ns tAVWL tAS Address Set-Up 0 0 0 0 0 ns Time tWLAX tAH Address Hold Time 60 60 60 90 ns tDVWH tDS Data Set-up Time 50 50 50 50 50 ns tWHDX tDH Data Hold Time 10 10 10 10 10 ns tWHGL Write Recovery 6 6 6 6 6 m s Time before Read tGHWL Read Recovery 0 0 0 0 0 m s Time before Write tELWL tCS Chip Enable 20 20 20 20 20 ns Set-Up Time before Write tWHEH tCH Chip Enable 0 0 0 0 0 ns Hold Time tWLWH tWP Write Pulse Width 80 80 80 80 80 ns tELEH Alternative Write 80 80 80 80 80 ns Pulse Width tWHWL tWPH Write Pulse 20 20 20 20 20 ns Width High tWHWH1 Duration of 10 25 10 25 10 25 10 25 10 25 m s Programming Operation tWHWH2 Duration of 95 105 95 105 95 105 95 105 95 105 ms Erase Operation tVPEL VPP Set-Up 100 100 100 100 100 ns Time to Chip Enable Low NOTES 1 Read timing characteristics during readwrite operations are the same as during read-only operations Refer to AC Char- acteristics for Read-Only Operations 2 Chip-Enable Controlled Writes Write operations are driven by the valid combination of Chip-Enable and Write-Enable In systems where Chip-Enable defines the write pulse width (within a longer Write-Enable timing waveform) all set-up hold and inactive Write-Enable times should be measured relative to the Chip-Enable waveform 17 |
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