1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

Ordering Information

PART NUMBER

TEMPERATURE RANGE

SCREENING LEVEL

PACKAGE

ACS86DMSR

Intersil Class S Equivalent

14 Lead SBDIP

ACS86KMSR

Intersil Class S Equivalent

14 Lead Ceramic Flatpack

ACS86D/Sample

Sample

14 Lead SBDIP

ACS86K/Sample

Sample

14 Lead Ceramic Flatpack

ACS86HMSR

Die

Die

ACS86MS

Radiation Hardened

Quad 2-Input Exclusive OR Gate

Pinouts

14 LEAD CERAMIC DUAL-IN-LINE

MIL-STD-1835 DESIGNATOR, CDIP2-T14, LEAD FINISH C

TOP VIEW

14 LEAD CERAMIC FLATPACK

MIL-STD-1835 DESIGNATOR, CDFP3-F14, LEAD FINISH C

TOP VIEW

A1

B1

Y1

A2

B2

Y2

GND

VCC

B4

A4

Y4

B3

A3

Y3

1

2

3

4

5

6

7

14

13

12

11

10

9

8

14

13

12

11

10

9

8

2

3

4

5

6

7

1

A1

B1

Y1

A2

B2

Y2

GND

VCC

B4

A4

Y4

B3

A3

Y3

April 1995

Truth Table

INPUTS

OUTPUT

An

Bn

Yn

LLL

LH

H

HLH

HH

L

NOTE: L = Logic Level Low, H = Logic Level High

Functional Diagram

An

Bn

(1, 4, 9, 12)

(2, 5, 10, 13)

Yn

(3, 6, 8, 11)

Features

• 1.25 Micron Radiation Hardened SOS CMOS

• Total Dose 300K RAD (Si)

• Single Event Upset (SEU) Immunity

• Latch-Up Free Under Any Conditions

• Significant Power Reduction Compared to ALSTTL

Logic

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

- VIL = 30% of VCC Max

- VIH = 70% of VCC Min

• Input Current

≤1µA at VOL, VOH

Description

The Intersil ACS86MS is a radiation hardened quad 2-input

exclusive OR gate. A high logic level on both inputs forces

the output to a logic low state.

The ACS86MS utilizes advanced CMOS/SOS technology to

achieve high-speed operation. This device is a member of the

radiation hardened, high-speed, CMOS/SOS Logic Family.

Spec Number

518849

File Number

3995