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CA3306CD Datasheet(PDF) 4 Page - Intersil Corporation

Part # CA3306CD
Description  6-Bit, 15 MSPS, Flash A/D Converters
PDF  16 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CA3306CD Datasheet(HTML) 4 Page - Intersil Corporation

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4-11
ANALOG INPUTS
Positive Full Scale Input Range
(Notes 3, 4)
1
4.8
VDD + 0.5
V
Negative Full Scale Input Range
(Notes 3, 4)
-0.5
0
VDD - 1
V
Input Capacitance
-15-
pF
Input Current
VIN = 4.92V, VDD = 5V
-
-
±500
µA
INTERNAL VOLTAGE REFERENCE
Zener Voltage
IZ = 10mA
5.4
6.2
7.4
V
Zener Dynamic Impedance
IZ = 10mA, 20mA
-
12
25
Ω
Zener Temperature Coefficient
-
-0.5
-
mV/oC
REFERENCE INPUTS
Resistor Ladder Impedance
650
1100
1550
Ω
DIGITAL INPUTS
Maximum VIN, Logic 0
All Digital Inputs (Note 4)
-
-
0.3 x VDD
V
Maximum VIN, Logic 1
All Digital Inputs (Note 4)
0.7 x VDD
--
V
Digital Input Current
Except CLK, VIN = 0V, 5V
-
±1
±5
µA
Digital Input Current
CLK Only
-
±100
±200
µA
DIGITAL OUTPUTS
Digital Output Three-State Leakage
VOUT = 0V, 5V
-
±1
±5
µA
Digital Output Source Current
VOUT = 4.6V
-1.6
-
-
mA
Digital Output Sink Current
VOUT = 0.4V
3.2
-
-
mA
TIMING CHARACTERISTICS
Auto Balance Time (
φ1)
CA3306C
50
-
∞
ns
CA3306, CA3306A
33
-
∞
Sample Time (
φ2)
CA3306C
(Note 4)
33
-
5000
ns
CA3306, CA3306A
22
-
5000
ns
Aperture Delay
-8-
ns
Aperture Jitter
-
100
-
psP-P
Output Data Valid Delay, tD
CA3306C
-
35
50
ns
CA3306, CA3306A
-
30
40
ns
Output Data Hold Time, tH
(Note 4)
15
25
-
ns
Output Enable Time, tEN
-20-
ns
Output Disable Time, tDIS
-15-
ns
POWER SUPPLY CHARACTERISTICS
IDD Current, Refer to Figure 4 CA3306C
Continuous Conversion (Note 4)
-
11
20
mA
CA3306, CA3306A
-
14
25
mA
IDD Current
Continuous
φ1
-
7.5
15
mA
NOTES:
1. OFFSET ERROR is the difference between the input voltage that causes the 00 to 01 output code transition and (VREF+ - VREF-)/128.
2. GAIN ERROR is the difference the input voltage that causes the 3F16 to overflow output code transition and (VREF+ - VREF-) x 127/128.
3. The total input voltage range, set by VREF+ and VREF-, may be in the range of 1 to (VDD + 1) V.
4. Parameter not tested, but guaranteed by design or characterization.
Electrical Specifications
TA = 25
oC, V
DD = 5V, VREF+ = 4.8V, VSS = VREF - = GND, Clock = 15MHz Square Wave for CA3306 or
CA3306A, 10MHz for CA3306C (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
CA3306, CA3306A, CA3306C



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