7-896

CD4046BMS

Chip Dimensions and Pad Layout

Dimensions in parentheses are in millimeters

and are derived from the basic inch dimensions

METALLIZATION:

Thickness: 11k

Å

PASSIVATION:

10.4kÅ - 15.6k

BOND PADS:

0.004 inches X 0.004 inches MIN

DIE THICKNESS:

0.0198 inches - 0.0218 inches

FIGURE 15. TYPICAL WAVEFORMS FOR COS/MOS PHASE-LOCKED LOOP

EMPLOYING PHASE COMPARATOR II IN LOCKED CONDICTION

III

III

SIGNAL INPUT (TERM 14)

VCO OUTPUT (TERM 4) =

COMPARATOR INPUT (TERM 3)

PHASE COMPARATOR II

OUTPUT (TERM 13)

VCO INPUT (TERM 9) =

∆ LOW-PASS FILTER

OUTPUT

PHASE PULSE (TERM 1)

NOTE: DASHED LINE IS AN OPEN

CIRCUIT CONDITION

(3RD STATE)

-VDD

-VSS

-VDD

-VSS

-VDD

-VSS

FIGURE 16. PHASE COMPARATOR II

OUTPUT LOADING CIRCUIT

VDD

VSS

2K

Ω

2K

Ω

20K

Ω

13

PHASE

COMPARATOR II

OUTPUT