6-9

Write Cycle Dynamic Electrical Specifications

PARAMETER

SYMBOL

(V)

UNITS

MIN

MAX

MIN

MAX

Write Cycle Time

5

300

-

420

-

ns

Address Setup Time (Note 1)

5

60

-

84

-

ns

Address Hold Time (Note1)

5

130

-

180

-

ns

Input Data Setup Time (Note 1)

5

90

-

125

-

ns

Input Data Hold Time (Note 1)

5

60

-

84

-

ns

Read/Write Pulse Width Low (Note 1)

5

110

-

155

-

ns

NOTE:

1. 100% testing. All other limits are designer’s parameters under given test conditions and do not represent 100% testing.

NOTES:

1. Chip-Select (CS) permitted to change from high to low level or remain low on a selected device.

2. Chip-Select (CS) permitted to change from low to high level or remain low.

3. Don’t care.

FIGURE 2. WRITE CYCLE TIMING DIAGRAM

CS

A0 - A9

R/W

(NOTE 3)

(NOTE 1)

(NOTE 2)

(NOTE 3)

(NOTE 3)

DI

CDP1821C/3