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AD8191 Datasheet(PDF) 10 Page - Analog Devices |
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AD8191 Datasheet(HTML) 10 Page - Analog Devices |
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10 / 32 page ![]() AD8191 Rev. 0 | Page 10 of 32 TA = 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, DVCC = 3.3 V, AMUXVCC = 5 V, AVEE = 0 V, DVEE = 0 V, differential input swing = 1000 mV, TMDS outputs terminated with external 50 Ω resistors to 3.3 V, pattern = PRBS 27 − 1, data rate = 1.65 Gbps, unless otherwise noted. REFERENCE EYE DIAGRAM AT TP1 DIGITAL PATTERN GENERATOR SMA COAX CABLE HDMI CABLE TP1 TP2 TP3 AD8191 EVALUATION BOARD SERIAL DATA ANALYZER Figure 9. Test Circuit Diagram for TX Eye Diagrams 0.125UI/DIV AT 1.65Gbps Figure 10. TX Eye Diagram at TP2, PE = 2 dB 0.125UI/DIV AT 1.65Gbps Figure 11. TX Eye Diagram at TP2, PE = 6 dB 0.125UI/DIV AT 1.65Gbps Figure 12. TX Eye Diagram at TP3, PE = 2 dB (Cable = 2 meters, 30 AWG) 0.125UI/DIV AT 1.65Gbps Figure 13. TX Diagram at TP3, PE = 6 dB (Cable = 10 meters, 28 AWG) |
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