ACE24C32/64B

Two-wire Serial EEPROM

VER 1.3

4

Pin Descriptions

Device/Page Addresses (A2, A1 and A0):

The A2, A1 and A0 pins are device address inputs that are hard wired for the ACE24C32B/ACE24C64B.

Eight 32K/64K devices may be addressed on a single bus system (device addressing is discussed in

detail under the Device Addressing section).

Serial Data (SDA):

The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be

wire-ORed with any number of other open-drain or open- collector devices.

Serial Clock (SCL):

The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock

data out of each device.

Write Protect (WP):

The ACE24C32B/ACE24C64B has a Write Protect pin that provides hardware data protection. The

Write Protect pin allows normal read/write operations when connected to ground (GND). When the Write

following Table 2.

WP Pin Status

Part of the Array Protected

ACE24C32B

ACE24C64B

Full (32K) Array

Full (256K) Array

At GND

Normal Read / Write Operations

Table 2 Write Protect

Memory Organization

ACE24C32B, 32K Serial EEPROM:

Internally organized with 128 pages of 32 bytes each, the 32K requires an 12-bit data word address for

random word address.

ACE24C64B, 64K Serial EEPROM:

Internally organized with 256 pages of 32 bytes each, the 64K requires an 13-bit data word address for

random word address.

Device Operation

Clock and Data Transitions:

The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only

during SCL low time periods (see to Figure 1). Data changes during SCL high periods will indicate a

start or stop condition as defined below.

Start Condition:

A high-to-low transition of SDA with SCL high is a start condition which must precede any other

command (see to Figure 2).

Stop Condition:

A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command

will place the EEPROM in a standby power mode (see to Figure 2).