ACE25C320G datasheet(27/37 Pages) ACE

27 / 37 page

ACE25C320G

Uniform SECTOR Dual and Quad Serial Flash

VER 1.5

Figure 25. Erase Security Registers command Sequence Diagram

Program Security Registers (42H)

The Program Security Registers command is similar to the Page Program command. It allows from

1 to 256 bytes Security Registers data to be programmed. A Write Enable (WREN) command must

previously have been executed to set the Write Enable Latch (WEL) bit before sending the Program

Security Registers command. The Program Security Registers command is entered by driving CS#

Low, followed by the command code (42H), three address bytes and at least one data byte on SI. As

soon as CS# is driven high, the self-timed Program Security Registers cycle (whose duration is tPP)

is initiated. While the Program Security Registers cycle is in progress, the Status Register may be

read to check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP) bit is 1 during

the self-timed Program Security Registers cycle, and is 0 when it is completed. At some unspecified

time before the cycle is completed, the Write Enable Latch (WEL) bit is reset.

If the Security Registers Lock Bit (LB3/LB2/LB1) is set to 1, the Security Registers will be

permanently locked. Program Security Registers command will be ignored.

Address

A23-A16

A15-A8

A7-A0

Security Registers 1

00H

01H

Byte Address

Security Registers 2

00H

02H

Byte Address

Security Registers 3

00H

03H

Byte Address

Figure26. Program Security Registers command Sequence Diagram

ACE25C320G Datasheet(PDF) 27 Page - ACE Technology Co., LTD.