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AN2512 Datasheet(PDF) 14 Page - STMicroelectronics |
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AN2512 Datasheet(HTML) 14 Page - STMicroelectronics |
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14 / 38 page ![]() Power calculation algorithm AN2512 14/38 In this chapter the readings of data records will be treated in case of 3 phase usage of STPM01, in particular we will refer to the flow chart in Figure 6. Figure 6. Flow chart of phase reading 3.2 STPM01 Initialization (latching) and reading (shifting) There are two phases of reading the STPM01 data called latching and shifting. Latching is used to sample results into transmission latches by initiating an active pulse on SYN while SCS is idle. The pulse length of SYN must be longer than 2 periods of the measurement clock (that is, t2 - t1 more than 500 ns). The latching phase has to be done at the same time for all the STPM01 devices keeping the SCSLx lines in idle state in order to read the information coming from each phase at the same moment. Shifting starts when SCS becomes active (low). At the beginning of this phase, another, much shorter pulse (t5 - t4 = 30 ns) should be applied to SYN. An alternative way to read shifted data is to extend the pulse on SYN into the second phase of reading (from t1 to t5). Latching and shifting finish at the last rise of SYN (shown by the t5 line in Figure 7). After these readings are completed, the STPM01 is reset. It is possible to read data, by applying 32 serial clocks per data record. Up to 8 data records can be read this way from each device. Switching to another device is possible enabling the corresponding SCS line. Note that, enabling multiple SCS lines corrupts the information received causing parity error. So, in any case, two or more devices cannot be enabled at the same time. In order to maximize the reliability of the readings, each data structure can be read twice and compared. This is possible just by restarting the shifting procedure, then applying the clock signal on the SCL pin one more time, keeping the corresponding SCS pin in active state (low). |
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