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UPD3737 Datasheet(PDF) 5 Page - NEC |
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UPD3737 Datasheet(HTML) 5 Page - NEC |
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5 / 16 page ![]() µPD3737 5 Saturation voltage Vsat 1.0 1.5 V Saturation exposure SE Daylight color fluorescent lamp 0.2 lx·s Photo response non-uniformity PRNU VOUT = 500 mV ±5 ±10 % Average dark signal ADS Light shielding 1.0 3.0 mV Dark signal non-uniformity DSNU Light shielding –3 +3 +6 mV –1 Power consumption PW 100 mW Output impedance ZO 0.2 0.5 k Ω Response RF Daylight color fluorescent lamp 6 7.5 9 V/lx·s Response peak wavelength 550 nm Image lag IL VOUT = 1 V 0.3 1 % Offset level VOS 2.0 3.0 5.0 V Input capacity of shift register clock C φ1 800 pF pin C φ2 Input capacity of last-stage shift C φ1L 50 pF register clock pin C φ2L Input capacity of reset pin C φR 10 pF Input capacity of transfer gate clock C φTG 150 pF pin Output fall delay time tdNote Time from 90 % to 10 % of φ2L fall 25 ns is 5ns. Register imbalance RI VOUT = 500 mV 0 4 % Transfer efficiency TTE VOUT = 500 mV, f φR1 = 20 MHz 92 98 % Dynamic range DR Vsat/DSNU 500 times Reset feed-through noise RFSN Light shielding 250 500 mV ELECTRICAL CHARACTERISTICS Ta = +25 °C, VDD = 12 V, fφ1 = 0.5 MHz, data rate = 1 MHz, storage time = 10 ms light source: 3200 K halogen lamp + C500 (infrared cut filter), input clock = 5 VP-P Parameter Symbol Test Conditions MIN. TYP. MAX. Unit Note td is defined as a time from 10 % of φ2L to 10 % of VOUT, output after passing through two steps of emitter follower in the application example. |
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