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UPD3739 Datasheet(PDF) 7 Page - NEC |
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UPD3739 Datasheet(HTML) 7 Page - NEC |
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7 / 24 page ![]() µPD3739 7 INPUT PIN CAPACITANCE (TA = +25 °C, VOD = 12 V) Parameter Symbol Pin name Pin No. MIN. TYP. MAX. Unit Shift register clock pin capacitance 1 Cφ1 φ11 10 250 350 500 pF φ12 13 250 350 500 pF Shift register clock pin capacitance 2 Cφ2 φ21 9 250 350 500 pF φ22 14 250 350 500 pF Last stage shift register clock pin capacitance CφL φ1L2 17 40 50 100 pF φ2L1 6 40 50 100 pF Reset gate clock pin capacitance CφR φR1 5 8 10 15 pF φR2 18 8 10 15 pF Transfer gate clock pin capacitance CφTG φTG 12 100 150 200 pF |
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