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UPD3778 Datasheet(PDF) 7 Page - NEC |
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UPD3778 Datasheet(HTML) 7 Page - NEC |
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7 / 24 page  µPD3778 7 Data Sheet S14374EJ1V0DS00 INPUT PIN CAPACITANCE (TA = +25 °C, VOD = 12 V) Parameter Symbol Pin name Pin No. MIN. TYP. MAX. Unit Shift register clock pin capacitance 1 Cφ1 φ1 11 400 pF 19 400 pF Shift register clock pin capacitance 2 Cφ2 φ2 14 400 pF 22 400 pF Reset gate clock pin capacitance CφRB φRB 2 15 pF Reset feed-through level clamp clock pin capacitance CφCLB φCLB 3 15 pF Transfer gate clock pin capacitance CφTG φTG1 18 120 pF φTG2 17 120 pF φTG3 15 120 pF Remark Pins 11 and 19 ( φ1), 14 and 22 (φ2) are each connected inside of the device. |
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