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AN4662 Datasheet(PDF) 22 Page - STMicroelectronics |
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AN4662 Datasheet(HTML) 22 Page - STMicroelectronics |
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22 / 43 page ![]() Inertial interrupt AN4662 Table 22: IG_SRC1(2) description IA Interrupt Active. Default value: 0 (0: no interrupt has been generated; 1: one or more interrupt requests has been generated) ZH Z High. Default value: 0 (0: no request; 1: ZH interrupt request has occurred) ZL Z Low. Default value: 0 (0: no request; 1: ZL interrupt request has occurred) YH Y High. Default value: 0 (0: no request; 1: YH interrupt request has occurred) YL Y Low. Default value: 0 (0: no request; 1: YL interrupt request has occurred) XH X High. Default value: 0 (0: no request; 1: XH interrupt request has occurred) XL X Low. Default value: 0 (0: no request; 1: XL interrupt request has occurred) 6.1 Duration The IG_DUR1(2) register content sets the minimum duration of the interrupt event to be recognized. Duration can also be represented as the number of consecutive samples that have to verify the interrupt condition before generating the interrupt signal. The duration counter starts to increase when the interrupt condition is verified and allows generating the interrupt only when the IG_DUR1(2) content value is reached; the steps and maximum time value depend on the selected ODR. In normal condition the duration counter is set to zero as soon as the interrupt condition is no longer verified unless the decrement function is enabled. Duration time is measured in N/ODR [s], where N is the duration register content and ODR can assume the values: 10, 50, 100, 200, 400 and 800 Hz. Table 23: Duration LSB value in normal mode ODR (Hz) Duration LSB value (ms) 10 100 50 20 100 10 200 5 400 2.5 800 1.25 The duration counter allows preventing an interrupt generation in the presence of a glitch bigger than the selected threshold. 6.1.1 Decrement function The decrement functionality is enabled by setting the DCRM1(2) bit to “1” in CTRL7(26h) register. When this function is enabled, the interrupt pin is set to an inactive state as soon as the interrupt condition is no longer verified, but the duration counter is not set to zero immediately: it starts to decrease from the IG_DUR1(2) register value. If a new interrupt condition is verified before the duration counter reaches zero, it starts to increase again from the actual value and a new interrupt is generated when the duration counter reaches again the IG_DUR1(2) register value. This function allows greater reactivity on consecutive interrupt conditions. 22/43 DocID027579 Rev 1 |
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