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AN4671 Datasheet(PDF) 12 Page - STMicroelectronics |
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AN4671 Datasheet(HTML) 12 Page - STMicroelectronics |
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12 / 17 page ![]() How to minimize switching losses AN4671 12/17 DocID027654 Rev 1 Figure 11: Gate source current at VDD=800 V, ID=20 A, Rg=1 Ω, VGS=-2 V to 20 V, Tj=25 °C) Figure 12: Gate sink current at VDD=800 V, ID=20 A, Rg=1 Ω, VGS=-2 V to 20 V, Tj=25 °C) The peak gate current is lower than 2 A in both cases; under any other test condition (higher case temperatures and lower drain current values), the gate current decreases slightly at turn-off and increases by a similar amount at turn-on. Both the voltage across the gate resistor and the gate current are limited by the parasitic source inductance and the drain current di/dt; Figure 11 in fact shows a high degree of ringing on the gate current caused by the oscillating ID and the source inductance at turn- on. Ideally, if the effect of the parasitic L were removed, we would expect the source current to exceed 2 A during turn-on, while during turn-off at Rg=1 Ω (see Figure 12) the gate current is quite stable and independent of the drain current. |
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