AN413 datasheet(32/45 Pages) STMICROELECTRONICS

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Examples of timer 0 configurations

AN413

32/45

Doc ID 1875 Rev 2

;

- Falling edge on EXTB

;

- EXTA I/O

;OACR-OBCR:

- No operation

;FLAG:

- reset value

;IDMR:

- IT compare 0

;DCPR:

- 00h

;DAPR:

- 00h

;IVR:

- interrupt vector 10h = T0_IT_VECT

;IDCR:

- priority level 4

;COMP0

spp #T0D_PG ; Timer 0 data register page

ldw T_CMP0R,nb_event_t0 ; COMP0

ld T_TCR,#00111000b ; TCR

ld T_TMR,#00000010b ; TMR

ld T_ICR,#01000010b ; ICR

ld T_PRSR,prescal_t0 ; PRESCALER

ld T_OACR,#11111100b ; OACR

ld T_OBCR,#11111100b ; OBCR

ld T_IDMR,#00000100b ; IDMR

spp #T0C_PG ; Timer 0 control register page

ld T0_DCPR,#0 ; DCPR

ld T0_DAPR,#0 ; DAPR

ld T0_IVR,#T0_IT_VECT ; IVR

ld T0_IDCR,#IT_T0_LEVEL ; IDCR

T0_START_IT

}

;*********************************************************************

proc GEST_T0_DMA{

;Configuration of Timer0 in IT CAPTURE associated to the DMA mode

;the length of DMA is given by lg_dma

;TCR:

- Stop count

;

- no clear

;

- Up count

;TMR:

- disable interrupt

;

- no bivalue mode

;

- no capture

;

- external/internal clock

;

- disable retrigger mode

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