AN413 datasheet(35/45 Pages) STMICROELECTRONICS

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AN413

Examples of timer 0 configurations

Doc ID 1875 Rev 2

35/45

ld t_icr,#00

; No action on input pins

ld t_prsr,#00

; No prescaling

ld t_oacr,#11111100b ; No action on T1OUTA

ld t_obcr,#11110100b ; Toggle on OVF T1OUTB

ld t_flagr,#00

ld t_idmr,#00

.macroT1_START ; Start TIMER 1

spp #T1D_PG ; select Timer 1 data register page

and t_tcr,#ccl ; counter clear bit

or t_tcr,#cen ; counter enable bit

.endm

or CICR,#10000000b ; Global counter enable

loop {

}

;*********************************************************************

; INTERRUPT SUBROUTINES FOR TIMER 0

;*********************************************************************

;These subroutines are serviced on TIMER 0 Interrupts. They come from:

; T0_IT_VECT + 4 for both - IT/CAPTURE

; and - DMA IT/CAPTURE end of block

; T0_IT_VECT + 6 for - IT/COMPARE

;***********************************************************************

; Timer 0 CAPTURE Interrupt subroutine:

; - IT Capture on event on EXTA

; - DMA IT/CAPTURE end of block

T0_CAP:

spp #T0D_PG

; Timer 0 data register page

tm T_FLAGR,#ccp0 ; mask successful capture

jxz RESET_START

; this is not an IT CAPTURE

; == Pb

tm T_FLAGR,#ocp0 ; overrun on Capture 0 ?

jxnz RESET_START ; yes == RESET

and T_FLAGR,#~cp0 ; reset successful capture flags

and T_FLAGR,#~ocp0 ; reset overrun on capture 0 flag

iret

; return from interrupt

;************************************************************************

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