LTC1287

5

1287fa

CC

HARA TERISTICS

A

TYPICALPERFOR

CE

100

0

300

400

500

1k

10k

100k

LTC G10

200

100

CLK = 500kHz

+IN

–IN

100

1k

10k

LTC1287 G13

1

10

100

+

–

0V TO 2.5V INPUT STEP

Sample-and-Hold Acquisition

Time vs Source Resistance

AMBIENT TEMPERATURE (

°C)

–50

0

100

300

400

500

1000

700

–10

30

50

130

LTC1287 G14

200

800

900

600

–30

10

70

90 110

ON CHANNEL

OFF CHANNEL

GUARANTEED

Input Channel Leakage Current vs

Temperature

REFERENCE VOLTAGE (V)

0

0

0.2

0.3

0.4

0.5

0.6

0.7

0.5

1.0

1.5

2.0

LTC1287 G15

2.5

0.8

0.9

1.0

0.1

3.0

LTC1287 NOISE = 200

Noise Error vs Reference Voltage

Maximum Clock Rate vs Source

Resistance

Minimum Clock Rate for 0.1LSB

Error**

Maximum Filter Resistor vs Cycle

Time

* MAXIMUM CLK FREQUENCY REPRESENTS THE CLK FREQUENCY AT WHICH A 0.1LSB

SHIFT IN THE ERROR AT ANY CODE TRANSITION FROM ITS 500kHz VALUE IS FIRST DETECTED.

** AS THE CLK FREQUENCY IS DECREASED FROM 1MHz, MINIMUM CLK FREQUENCY

(

∆ERROR ≤ 0.1LSB) REPRESENTS THE FREQUENCY AT WHICH A 0.1LSB SHIFT IN ANY

CODE TRANSITION FROM ITS 500kHz VALUE IS FIRST DETECTED.

PI FU CTIO S

CYCLE TIME (

µs)

10

100

1k

10k

10

1000

10000

LTC1287 G12

1

100

+

–

AMBIENT TEMPERATURE (

°C)

–50

0.05

0.10

0.15

0.20

–25

025

50

LTC1287 G11

75

100

0.25

CS (Pin 1): Chip Select Input. A logic low on this input

enables the LTC1287.

+IN, –IN (Pin 2,3): Analog Inputs. These inputs must be

free of noise with respect to GND.

GND (Pin 4): Analog Ground GND should be tied directly

to an analog ground plane.

the span of the A/D converter and must be kept free of

noise with respect to GND.

result is shifted out of this output.

CLK (Pin 7): Shift Clock. This clock synchronizes the serial

data transfer.

of noise and ripple by bypassing directly to the analog

ground plane.