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16-BIT TIMING OPERATIONS USING ST7262 OR ST7263B MCUs

Once the high level of the wave is split up we will use the same technique to generate the low

level.

Low Level period = 200 µs

= 1* FFh + 91h

So to generate the low level part of the PWM signal we have to:

– Generate an elementary PWM wave at low level

– Then generate the last wave at low level with a period of 91h

These different waves are computed and then cascaded by software using the Interrupt rou-

tine.

For this reason, a minimum PWM period has to be respected to allow enough time to complete

the interrupt routine task. In the software provided with this application note the minimum time

to be respected is the following :

The minimum DutyCycle = 55 Tcpu with LowLevel period >= 85 Tcpu.

with Ttimer = 0.125 µs we were able to generate a PWM signal with high level period=10.6 µs

and Lowlevel period = 16.63 µs .

This limitation applies only when working with values lower than FFh.

2.1.1.2 Generation Sequence

In general cases, the following variables are used to define the PWM signal in 16-bit mode:

– DutyCycleHR: 8-bit variable that defines the PWM signal duty cycle High register

– DutyCycleLR: 8-bit variable that defines the PWM signal duty cycle low register

– LowLevelHR: 8-bit variable that defines the PWM signal low level period High Register

– LowLevelLR: 8-bit variable that defines the PWM signal low level period Low Register

The pair of 8-bit variables (DutyCycleHR, DutyCycleLR) are used to hold the 16-bit value of

the PWM high level. The second pair of registers used to hold the low level period are Lowlev-

elHR and LowLevelLR.

Figure 15. PWM Parameters

To generate a PWM signal with 16-bit resolution, perform the steps shown in Figure 16.

DutyCycleHR (MSB)

DutyCycleLR (LSB)

LowLevelHR (MSB)

LowLevelLR (LSB)

Duty Cycle

Low Level