AN2593

Daisy-chained vectored interrupt service routine limitation

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the interrupt controller’s hardware priority register in the daisy chained interrupt

controller. Branch to the interrupt service routine address given by VICVectorAddr for

VIC1 plus offset to skip the interrupt stacking preamble. You can do this using an LDR

PC instruction.

6.

Execute the "IENABLE" macro so that a higher priority can be serviced.

7.

Execute the Interrupt Service Routine (ISR).

8.

Clear the requesting interrupt in the peripheral, or write to the VICSoftIntClear Register

if the request was generated by a software interrupt.

9.

Execute the "IDISABLE" macro to disable IRQs when exiting from the interrupt service

routine and returning to IRQ mode.

10. Write to the daisy chained VICVectAddr Register VIC1. This clears the respective

interrupt in the daisy chained interrupt controller.

11. Return from the interrupt. This re-enables interrupts.

Note:

The description of the limitation and the flow sequence handling are taken mainly from the

ARM Prime Cell Vectored Interrupt Controller (PL190) Errata Notice.

3.4

Workaround using the STR9 firmware library

For already existing software that services daisy-chained nested interrupts, a possible

software workaround would be to branch to the address provided by the VIC1 VAR register.

This ensures that the correct ISR is serviced. (Refer to Table 2).

To do this an inline assembly code macro could be used:

#define DAISY_VIC asm("MOV r11, #0xFC000000"); /*

VectorAddressDaisy address */ \

asm("ADD r11, r11, #0x30"); /*

VectorAddressDaisy address */ \

asm("LDR r11, [r11]"); /*

Update VIC1 hardware priority */ \

asm("ADD r11 ,r11 , #0x18"); /*

Skip the preamble (+0x18) */ \

asm("BX

r11");

/* Branch to the highest priority*/ \

/*interrupt from VIC1 */

Please note that the value 0x18 used in instruction "ADD r11, r11, #0x18" is only specific to

the example code given here. The offset #0x18 will be dependent on the system's interrupt

stacking preamble code size.

Example: EXTI0 interrupt (interrupt on VIC1)

void EXTIT0_IRQHandler (void)

{

/*VIC1 Hardware Priority update and branch to the highest priority interrupt*/

DAISY_VIC;

/* switch to system mode with IRQ enabled*/

IENABLE;

/* clear interrupt flag and process interrupt */

...

...

/* switch to IRQ mode with IRQ disabled

IDISABLE;

/* Write any value to VIC1 Vector address register */

VIC1->VAR = 0xFF}