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AN2647 Datasheet(PDF) 32 Page - STMicroelectronics |
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AN2647 Datasheet(HTML) 32 Page - STMicroelectronics |
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32 / 34 page ![]() Interfacing with synchronous memory AN2647 32/34 DMA for high speed data transfer STR91xFA has up to 96 KBytes of internal SRAM for data storage. DMA is the most efficient way to transfer data between internal SRAM and the external PSRAM. The advantages of using the DMA Controller are: – Reduce the load on CPU – Data is transferred in high speed burst mode You can select one of the eight available DMA channel for data transfer. The transfer is of the memory-to-memory type. Therefore, the DMA channel commences transfers without DMA requests. For burst Write, the source address is the internal SRAM and the destination address is the external PSRAM.For more details user can refer to the PSRAM synchronous example accompanied with the current application note which use DMA to generate burst writes in the external PSRAM. For burst read, the source address is the PSRAM and the destination address is the internal SRAM. The continuous burst read cycle in Figure 8 supports a data transfer rate of one BCLK clock period per halfword. Note the chip select CSx and EMI_RDn stay low until the burst cycle is completed. Figure 17. EMI continuous burst read during DMA |
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