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ST9 Datasheet(PDF) 134 Page - STMicroelectronics |
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ST9 Datasheet(HTML) 134 Page - STMicroelectronics |
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134 / 146 page  134/146 ST9 USER GUIDE 6.10 MULTIFUNCTION TIMER Figure 50 . Multifunction Timer Block Diagram UP/Down Logic Trigger up (TxINA) Trigger down (TxINB) Up / down (TxINA) Autodiscrimination Clock up (TxINA) Clock down (TxINB) 8-bit Prescaler Prescaler Register Gate 3 Internal Clock External clock either TxINA or TxINB or both of these inputs Ext. clock 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Not used Not used Gate Gate Not used Trigger Gate Trigger Clock up Up / down Trigger up Up / down Autodiscrim. Trigger Ext. clock Trigger Not used Trigger Not used Trigger Ext. clock Not used Ext. clock Trigger Clock down Ext. clock Trigger down Not used Autodiscrim. Ext. clock Trigger Gate TxINA pin TxINB pin 0 0 nop 0 1 1 0 1 1 and TxINA / TxINB Configuration (Inputs in alternate function) TxOUTA pin TxOUTB pin See operating modes of the MFT block diagram * MFT0 Registers, page 10 MFT1 Registers, page 8 (ST 9030 / 9040) IN3 IN2 IN1 IN0 A0 B1 B0 A1 ICR (R250*) External Input Control Register 70 TxINA Trigger Input Function TxINB Input Function PRSR (R251*) P7 P0 0 7 B0 B1 B0 B1 B0 OP CEV B1 OACR (R252) Output A Control Register 70 B0 B1 B0 B1 B0 OP CEV B1 OBCR (R253) Output B Control Register 70 On-chip Event Signal on OVF Preset Value or Current Level on TxOUTB Pin <COMP0><COMP1><OVF> <COMP0><COMP1><OVF> On-chip Event Signal on CMP0R Preset Value or Current Level on TxOUTA Pin Successful Event on MFT Action on TxOUTA or TxOUTB Set Toggle Reset Nop B0 0 0 1 1 B1 0 1 0 1 TMR (R253) Timer Mode Register Bits 6 and 7 OE1 OE0 7 6 TxOUT A Enable TxOUT B Enable |
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