DocID026267 Rev 1

11/15

TN1176

Peripheral migration

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If an existing software uses more than 20 backup registers, it is necessary to apply some

changes when using the STM32L15xx6/8/B-A device. In this case the data can be stored

alternatively into the EEPROM memory.

If in existing software uses less than 20 backup registers no change is required when using

the STM32L15xx6/8/B or STM32L100x6/8/B.

3.1.7

Touch sensing interface change

The touch sensing interface has been modified in the STM32L15xx6/8/B-A device - the

features are the same but there is a new software touch library for the STM32L15xx6/8/B-A

device, available on the company website at www.st.com/stm32.

3.2

Device limitations, changes and/or updates

New revisions of errata sheets have been published for the STM32L15xx6/8/B-A and for the

STM32L100x6/8/B-A devices. Several limitations that had been reported for the

STM32L15xx6/8/B and for the STM32L100x6/8/B have been solved, while new limitations

have been introduced. This section describes the changes in the device limitations.

Please refer to STM32L15xx6/8/B-A errata sheet and STM32L100x6/8/B-A errata sheet for

details on the device limitations.

3.2.1

Removed limitations

The following limitations that applied to STM32L15xx6/8/B and STM32L100x6/8/B devices

do not apply to STM32L100x6/8/B-A nor STM32L100x6/8/B-A devices:



Factory trimming values not available (for temperature sensor and internal reference

voltage).



Debug support for low power modes with entry through the WFE instruction.



Pull-up on PB7 when configured in analog mode.



HSEBYP bit of Clock control register has an undefined reset value.



USB line pull-up resistor has a value lower than 1.5kOhm.



CRC still sensitive to communication clock when SPI is in slave mode even with NSS

high.

3.2.2

Newly introduced limitations

The following limitations which were not present in STM32L15xx6/8/B nor

STM32L100x6/8/B devices have been introduced for STM32L15xx6/8/B-A and

STM32L100x6/8/B-A devices:



The number of RTC backup registers is 20 bytes instead of 80 bytes.



The data EEPROM cycling is limited to 100 kcycles instead of 300 kcycles.



If the debugger is connected in JTAG mode and if JNRST (PB4) pin configuration is

changed, the connection is lost.



The wakeup sequence from Standby mode when using more than one wakeup source

requires a special entry into Standby mode.

Please refer to STM32L15xx6/8/B, STM32L100x6/8/B errata sheets and

STM32L15xx6/8/B-A, STM32L100x6/8/B-A errata sheets for details on the device

limitations.