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UPD75004 Datasheet(PDF) 18 Page - NEC |
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UPD75004 Datasheet(HTML) 18 Page - NEC |
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18 / 66 page ![]() µPD75004, 75006, 75008 18 76 5 MBE 0 0 MBE 0 0 MBE 0 0 MBE 0 0 MBE 0 0 MBE 0 0 Internal reset start address (upper 5 bits) Internal reset start address (lower 8 bits) INTBT/INT4 start address (upper 5 bits) INTBT/INT4 start address (lower 8 bits) INT0 start address (upper 5 bits) INT0 start address (lower 8 bits) INT1 start address (upper 5 bits) INT1 start address (lower 8 bits) INTCSI start address (upper 5 bits) INTCSI start address (lower 8 bits) INTT0 start address (upper 5 bits) INTT0 start address (lower 8 bits) 0000H 0002H 0004H 0006H 0008H 000AH 0020H 007FH 0080H 07FFH 0800H 0FFFH 1000H 1F7FH GETI instruction reference table 0 BRCB ! caddr instruction branch address CALLF ! faddr instruction entry address BR ! addr instruction branch address CALL ! addr instruction subroutine entry address BR $addr instruction relational branch address (–15 to –1, +2 to +16) Branch destination address and subroutine entry address for GETI instruction Address BRCB ! caddr instruction branch address Fig. 4-3 Program Memory Map ( µPD75008) |
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