LTC3448_15 datasheet(12/20 Pages) LINER

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LTC3448

3448f

APPLICATIO S I FOR ATIO

top and bottom MOSFET RDS(ON) and the duty cycle

(DC) as follows:

RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)

The RDS(ON) for both the top and bottom MOSFETs can

be obtained from the Typical Performance Characteris-

tics curves. Thus, to obtain I2R losses, simply add RSW

to RL and multiply the result by the square of the

average output current.

3. At load currents below the selected threshold the

LTC3448 will switch into low ripple LDO mode if en-

abled. In this case the losses are due to the DC bias

currents as given in the electrical characteristics and

I2R losses due to the (VIN – VOUT) voltage drop across

the internal pass transistor.

Other losses when in switching operation, including CIN

and COUT ESR dissipative losses and inductor core losses,

generally account for less than 2% total additional loss.

Thermal Considerations

The LTC3448 requires the package backplane metal (GND

pin) to be well soldered to the PC board. This gives the DFN

and MSOP packages exceptional thermal properties, mak-

ing it difficult in normal operation to exceed the maximum

junction temperature of the part. In most applications the

LTC3448 does not dissipate much heat due to its high

efficiency. In applications where the LTC3448 is running at

high ambient temperature with low supply voltage and high

duty cycles, such as in dropout, the heat dissipated may

exceed the maximum junction temperature of the part if it

is not well thermally grounded. If the junction temperature

reaches approximately 150

°C,bothpowerswitcheswillbe

turned off and the SW node will become high impedance.

To avoid the LTC3448 from exceeding the maximum

junction temperature, the user will need to do some

thermal analysis. The goal of the thermal analysis is to

determine whether the power dissipated exceeds the

maximum junction temperature of the part. The tempera-

ture rise is given by:

TR = PDθJA

where PD is the power dissipated by the regulator and θJA

is the thermal resistance from the junction of the die to the

ambient temperature.

The junction temperature, TJ, is given by:

TJ = TA + TR

where TA is the ambient temperature.

As an example, consider the LTC3448 in dropout at an

input voltage of 2.7V, a load current of 600mA and an

ambient temperature of 70

°C. From the typical perfor-

mance graph of switch resistance, the RDS(ON) of the

P-channel switch at 70

°C is approximately 0.52Ω. There-

fore, power dissipated by the part is:

PD = ILOAD2 • RDS(ON) = 187.2mW

For the 3mm

× 3mm DFN package, the θJA is 43°C/W.

Thus, the junction temperature of the regulator is:

TJ = 85°C + (0.1872)(43) = 93°C

which is well below the maximum junction temperature of

125

°C.

Note that at higher supply voltages, the junction tempera-

ture is lower due to reduced switch resistance RDS(ON).

Checking Transient Response

The regulator loop response can be checked by looking at

the load transient response. Switching regulators take

several cycles to respond to a step in load current. When

a load step occurs, VOUT immediately shifts by an amount

equal to (

∆ILOAD • ESR), where ESR is the effective series

resistance of COUT. ∆ILOAD also begins to charge or dis-

charge COUT, which generates a feedback error signal. The

regulator loop then acts to return VOUT to its steady-state

value. During this recovery time VOUT can be monitored for

overshoot or ringing that would indicate a stability prob-

lem. For a detailed explanation of switching control loop

theory, see Application Note 76.

A second, more severe transient is caused by switching in

loads with large (>1

µF) supply bypass capacitors. The

discharged bypass capacitors are effectively put in parallel

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