UPD753036 datasheet(2/88 Pages) NEC

2 / 88 page

µPD753036, 753036(A)

Data Sheet U11353EJ4V0DS00

Functional Outline

Parameter

Function

Minimum instruction

• 0.95, 1.91, 3.81, 15.3

µs (main system clock: @4.19 MHz operation)

execution time

• 0.67, 1.33, 2.67, 10.7

µs (main system clock: @6.0 MHz operation)

• 122

µs (subsystem clock: @32.768 kHz operation)

On-chip memory

ROM

16384

× 8 bits

RAM

768

× 4 bits

General purpose register

• 4-bit operation: 8

× 4 banks

• 8-bit operation: 4

× 4 banks

Input/

CMOS input

On-chip pull-up resistors can be specified by using software: 27

output

CMOS input/output

port

Bit port output

Also used for segment pins

N-ch open-drain

On-chip pull-up resistors can be specified by using mask option

input/output pins

13 V withstand voltage

Total

LCD controller/driver

• Segment selection:

12/16/20 segments (can be changed to bit port output

in unit of 4; max. 8)

• Display mode selection:

Static

1/2 duty (1/2 bias)

1/3 duty (1/2 bias)

1/3 duty (1/3 bias)

1/4 duty (1/3 bias)

On-chip split resistor for LCD drive can be specified by using mask option

Timer

5 channels

• 8-bit timer/event counter: 3 channels

(16-bit timer/event counter, career generator, timer with gate)

• Basic interval/watchdog timer: 1 channel

• Watch timer: 1 channel

Serial interface

• 3-wire serial I/O mode ... MSB or LSB can be selected for transferring first bit

• 2-wire serial I/O mode

• SBI mode

A/D converter

8-bit resolution

× 8 channels (1.8 V ≤ AVREF ≤ VDD)

Bit sequential buffer (BSB)

16 bits

Clock output (PCL)

•

Φ, 524, 262, 65.5 kHz (main system clock: @4.19 MHz operation)

•

Φ, 750, 375, 93.8 kHz (main system clock: @6.0 MHz operation)

Buzzer output (BUZ)

• 2, 4, 32 kHz (main system clock: @4.19 MHz operation

or subsystem clock: @32.768 kHz operation)

• 2.93, 5.86, 46.9 kHz (main system clock: @6.0 MHz operation)

Vectored interrupts

External: 3, Internal: 5

Test input

External: 1, Internal: 1

System clock oscillator

• Ceramic or crystal oscillator for main system clock oscillation

• Crystal oscillator for subsystem clock oscillation

Standby function

STOP/HALT mode

Power supply voltage

VDD = 1.8 to 5.5 V

Package

• 80-pin plastic QFP (14

× 14 mm, 0.65 mm pitch)

• 80-pin plastic TQFP (fine pitch) (12

× 12 mm, 0.5 mm pitch)

UPD753036 Datasheet(PDF) 2 Page - NEC

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