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LT1573CS8 Datasheet(PDF) 12 Page - Linear Technology |
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LT1573CS8 Datasheet(HTML) 12 Page - Linear Technology |
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12 / 16 page ![]() 12 LT1573 needed during output transients, more capacitance can be added to the regulator output. If more capacitance is added to the output, the bandwidth of the regulator is lowered. A large value compensation capacitor may be needed to lower the frequency of the compensation zero to avoid high frequency oscillation. Equal value output capacitors with different ESR can have different output transient response. High frequency performance will be strongly affected by parasitics in the output capacitor and board layout. Some experimentation with the external compensation will be required for optimum results. Shutdown Function The regulator can be shut down by pulling the SHDN pin voltage higher than the shutdown threshold (about 1.3V). The regulator will restart itself if the SHDN is pulled below the shutdown threshold.The SHDN pin should be tied to ground if it is not used. The SHDN pin voltage can be higher than the input voltage. When the SHDN pin voltage is higher than 2V, the SHDN pin current increases and is limited by a 20k resistor. Momentarily putting the device into shutdown also resets the overcurrent latch. Lower Dropout Voltage or Higher Output Current Capability Lower dropout voltage or higher output current capability can be achieved by paralleling several output PNP transis- tors as shown in Figure 3. By paralleling output PNP transistors, the equivalent resistance between the emit- ters (VIN) and collectors (VOUT) is lowered or each PNP transistor sharing the output current now runs at a lower collector current, which causes the dropout voltage to decrease. Because the PNP transistors are running at a lower collector current where the transistor beta is higher, much more output current can be obtained at a given base drive current. When paralleling two or more output tran- sistors, a separate resistor is needed for RB and RD for each output transistor. This allows the base drive current to be split evenly between output transistors, which pro- motes equal output current sharing. In the specific example drawn in Figure 3 with two output transistors, the resistance of RB1 and RB2 is now twice the value of the resistance of RB in Figure 2, and the resistance of RD1 and RD2 is twice the value of the resistance of RD in Figure 2. In case of n PNP transistors in parallel, the resistance RB COMP VOUT VIN DRIVE FB LATCH SHDN GND LT1573 + CTIME COUT1 CC VIN RC VOUT GND 1573 F03 RB1 RB2 RD2 RD1 R1 R2 LOAD + QOUT2 QOUT1 CIN Figure 3. Reduced Dropout Voltage or Increased Output Current by Paralleling Output PNP Transistors APPLICATIO S I FOR ATIO |
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