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UPD75316GF Datasheet(PDF) 13 Page - NEC |
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UPD75316GF Datasheet(HTML) 13 Page - NEC |
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13 / 62 page  µPD75312(A), 75316(A) 13 3.3 PIN INPUT/OUTPUT CIRCUITS The following shows a simplified input/output circuit diagram for each pin of the µPD75316(A). TYPE A (for TYPE E–B) TYPE D (for TYPE E – B, F TYPE B TYPE E–B IN VDD Input buffer of CMOS standard data output disable OUT P–ch N–ch Push–pull output that can be set in a output high–impedance state (both P–ch and N–ch are off) IN Schmitt trigger input with hysteresis characteristics data output disable Type D Type A P.U.R. enable VDD P.U.R. P–ch IN/OUT P.U.R. : Pull–Up Resistor P.U.R. enable VDD P.U.R. P–ch TYPE B–C TYPE F–A IN data output disable Type D Type B P.U.R. enable VDD P.U.R. P–ch IN/OUT P.U.R. : Pull–Up Resistor P.U.R. : Pull–Up Resistor A) – VDD P–ch N–ch |
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