LT1578CS8 datasheet(6/28 Pages) LINER

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LT1578/LT1578-2.5

PIN FUNCTIONS

VSW (Pin 1): The switch pin is the emitter of the on-chip

power NPN switch. This pin is driven up to the input pin

voltage during switch on time. Inductor current drives the

switch pin negative during switch off time. Negative volt-

age is clamped with the external catch diode. Maximum

negative switch voltage allowed is – 0.8V.

VIN (Pin 2): This is the collector of the on-chip power NPN

switch. This pin powers the internal circuitry and internal

regulator. At NPN switch on and off, high dI/dt edges occur

through this pin. Keep the external bypass and catch diode

close to this pin. Trace inductance in this path will create

a voltage spike at switch off, adding to the VCE voltage

across the internal NPN.

BOOST (Pin 3): The BOOST pin is used to provide a drive

voltage, higher than the input voltage, to the internal

bipolar NPN power switch. Without this added voltage, the

typical switch voltage loss would be about 1.5V. The

additional boost voltage allows the switch to saturate with

its voltage drop approximating that of a 0.2

Ω FET struc-

ture. Efficiency improves from 75% for conventional bipo-

lar designs to > 88% for the LT1578.

GND (Pin 4): The GND pin connection needs consideration

for two reasons. First, it acts as the reference for the

regulated output, so load regulation will suffer if the

“ground” end of the load is not at the same voltage as the

GND pin of the IC. This condition will occur when load

current or other currents flow through metal paths be-

tween the GND pin and the load ground point. Keep the

ground path short between the GND pin and the load and

use a ground plane when possible. The second consider-

ation is EMI caused by GND pin current spikes. Internal

capacitance between the VSW pin and the GND pin creates

very narrow (<10ns) current spikes in the GND pin. If the

GND pin is connected to system ground with a long metal

trace, this trace may radiate EMI. Keep the path between

the input bypass and the GND pin short. The GND pin of the

SO-8 package is directly attached to the internal tab. This

pin should be attached to a large copper area to improve

thermal resistance.

VC (Pin 5): The VC pin is the output of the error amplifier

and the input to the peak switch current comparator. It is

normally used for frequency compensation, but can do

double duty as a current clamp or control loop override.

This pin sits at about 1V for very light loads and 2V at

maximum load. It can be driven to ground to shut off the

regulator, but if driven high, current must be limited to

4mA.

FB/SENSE (Pin 6): The feedback pin is used to set output

voltage using an external voltage divider that generates

1.21V at the pin with the desired output voltage. The fixed

voltage (2.5V) parts have the divider included on the chip

and the FB pin is used as a sense pin, connected directly

to the 2.5V output. Three additional functions are per-

formed by the FB pin. When the pin voltage drops below

0.7V, the switch current limit and the switching frequency

are reduced and the external sync function is disabled. See

Feedback Pin Function section in Applications Information

for details.

SHDN (Pin 7): The shutdown pin is used to turn off the

regulator and to reduce input drain current to a few

microamperes. Actually, this pin has two separate thresh-

olds, one at 2.42V to disable switching, and a second at

0.4V to force complete micropower shutdown. The 2.42V

threshold functions as an accurate undervoltage lockout

(UVLO). This can be used to prevent the regulator from

operating until the input voltage has reached a predeter-

mined level.

SYNC (Pin 8): The SYNC pin is used to synchronize the

internal oscillator to an external signal. It is directly logic

compatible and can be driven with any signal between

10% and 90% duty cycle. The synchronizing range is

equal to

initial operating frequency, up to 400kHz. When

not used, this pin should be grounded. See Synchronizing

section in Applications Information for details.

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