UPD754264 datasheet(46/68 Pages) NEC

46 / 68 page

µPD754264

System Clock Oscillator Characteristics (TA = –40 to +85

°C, VDD = 1.8 to 6.0 V)

Resonator

Recommended Constant

Parameter

Testing Conditions

MIN.

TYP.

MAX.

Unit

Ceramic

Oscillation

1.0

6.0Notes2, 3, 4

MHz

resonator

frequency (fX)Note1

Oscillation

After VDD reaches MIN.

stabilization

value of oscillation

timeNote 5

voltage range

Crystal

Oscillation

1.0

6.0Notes2, 3, 4

MHz

resonator

frequency(fX)Note1

Oscillation

VDD = 4.5 to 6.0 V

stabilization timeNote3

External

X1 input

1.0

6.0Notes2, 3, 4

MHz

clock

frequency (fX)Note1

X1 input high- and

83.3

500

low-level widths

(tXH, tXL)

Notes 1. Only the oscillator characteristics are shown. For the instruction execution time, refer to AC Character-

istics.

2. If the oscillation frequency is 2.1 MHz < fX

≤ 4.19 MHz at 1.8 V ≤ VDD < 2.0 V, set the processor control register

(PCC) to a value other than 0011. If the PCC is set to 0011, the rated machine cycle time of 1.9

µs is not

satisfied.

3. If the oscillation frequency is 4.19 MHz < fX

≤ 6.0 MHz at 1.8 V≤ VDD < 2.0 V, set the processor control register

(PCC) to a value other than 0011 or 0010. If the PCC is set to 0011 or 0010, the rated machine cycle time

of 1.9

µs is not satisfied.

4. If the oscillation frequency is 4.19 MHz < fX

≤ 6.0 MHz at 2.0 V≤ VDD < 2.7 V, set the processor control register

(PCC) to a value other than 0011. If the PCC is set to 0011, the rated machine cycle time of 0.95

µs is not

satisfied.

5. Oscillation stabilization time is a time required for oscillation to stabilize after application of VDD,

or after the STOP mode has been released.

Caution

When using the oscillation circuit of the system clock, wire the portion enclosed in dotted lines

in the figures as follows to avoid adverse influences on the wiring capacitance:

• Keep the wire length as short as possible.

• Do not cross other signal lines.

• Do not route the wiring in the vicinity of lines though which a high fluctuating current flows.

• Always keep the ground point of the capacitor of the oscillation circuit as the same potential as

VSS.

• Do not connect the power source pattern through which a high current flows.

• Do not extract signals from the oscillation circuit.

UPD754264 Datasheet(PDF) 46 Page - NEC

UPD754264 Datasheet(HTML) 46 Page - NEC

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