UPD75517 datasheet(39/180 Pages) NEC

39 / 180 page

µPD75517(A)

4. PERIPHERAL HARDWARE FUNCTIONS

4.1 DIGITAL I/O PORTS

The

µPD75517(A) employs memory-mapped I/O, enabling all I/O ports to be mapped to data memory space.

Fig. 4-1

Data Memory Address Assigned to Digital Port

Table 4-1 lists the I/O port manipulation instructions. These instructions provide a wide range of control

including 8-bit I/O and bit manipulation as well as 4-bit I/O.

Examples 1. Test the state of P13, then output different values to ports 4 and 5 according to the test result.

SKT

PORT1.3

; Skip if bit 3 of port 1 is 1

MOV XA, #18H

; XA

← 18H

Consecutive

MOV XA, #14H

; XA

← 14H

SEL

MB15

; or CLR1 MBE

OUT PORT4, XA ; Ports 5 and 4

← XA

2. SET1 PORT4.@L

; Set the bit of ports 4 to 7 specified by the L register to 1

P03

P02

P01

PORT 0

FF0H

P00

3210

Symbol

Address

P13

P12

P11

PORT 1

FF1H

P10

P23

P22

P21

PORT 2

FF2H

P20

P33

P32

P31

PORT 3

FF3H

P30

P43

P42

P41

PORT 4

FF4H

P40

P53

P52

P51

PORT 5

FF5H

P50

P63

P62

P61

PORT 6

FF6H

P60

P73

P72

P71

PORT 7

FF7H

P70

P83

P82

P81

PORT 8

FF8H

P80

P93

P92

P91

PORT 9

FF9H

P90

P103

P102

P101

PORT 10

FFAH

P100

P113

P112

P111

PORT 11

FFBH

P110

P123

P122

P121

PORT 12

FFCH

P120

P133

P132

P131

PORT 13

FFDH

P130

P143

P142

P141

PORT 14

FFEH

P140

P153

P152

P151

PORT 15

FFFH

P150

UPD75517 Datasheet(PDF) 39 Page - NEC

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