7

LTC1064

Figure 2. Example Ground Plane Breadboard Technique for LTC1064

ANALOG CONSIDERATIONS

Grounding and Bypassing

The LTC1064 should be used with separated analog and

digital ground planes and single point grounding

techniques.

Pin 6 (AGND) should be tied directly to the analog ground

plane.

0.1

µF ceramic capacitor with leads as short as possible.

µF ceramic

the analog ground plane.

noise and ripple.

All analog inputs should be referenced directly to the

single point ground. The clock inputs should be shielded

from and/or routed away from the analog circuitry and a

separate digital ground plane used.

Figure 2 shows an example of an ideal ground plane design

for a two-sided board. Of course this much ground plane

will not always be possible, but users should strive to get

as close to this as possible. Protoboards are not

recommended.

Buffering the Filter Output

When driving coaxial cables and 1

× scope probes, the

filter output should be buffered. This is important espe-

cially when high Qs are used to design a specific filter.

Inadequate buffering may cause errors in noise, distor-

tion, Q and gain measurements. When 10

× probes are

used, buffering is usually not required. An inverting buffer

is recommended especially when THD tests are per-

formed. As shown in Figure 3, the buffer should be

adequately bypassed to minimize clock feedthrough.

ANALOG

GROUND

PLANE

NOTE: CONNECT ANALOG AND DIGITAL

GROUND PLANES AT A SINGLE POINT AT

THE BOARD EDGE

FOR BEST HIGH FREQUENCY RESPONSE

PLACE RESISTORS PARALLEL TO DOUBLE-

SIDED COPPER CLAD BOARD AND LAY FLAT

(4 RESISTORS SHOWN HERE TYPICAL)

LTC1064

0.1

µF

CERAMIC

PIN 1 IDENT

1064 F02

5k

–7.5V

7.5V

0.1

µF CERAMIC

(SINGLE POINT

GROUND)

CLOCK

1

2

3

4

5

6

7

8

9

10

11

12

DIGITAL

GROUND

PLANE

24

23

22

21

20

19

18

17

16

15

14

13