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UPD7564ACSA Datasheet(PDF) 12 Page - NEC

Part # UPD7564ACSA
Description  4-BIT SINGLE-CHIP MICROCOMPUTER
PDF  56 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

UPD7564ACSA Datasheet(HTML) 12 Page - NEC

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µPD7564A, 7564A(A)
(3) P100 to P103 (Port 10) and P110 to P113 (Port 11): Quasi-bidirectional input/output
P100 to P103 are 4-bit I/O pins which form the port 10 (4-bit I/O port with an output latch). P110 to P113 are 4-
bit I/O pins which form the port 11 (4-bit I/O port with an output latch).
The port output instruction (OPL) latches the content of the accumulator to the output latch and outputs it to the
4-bit pins.
The data written once in the output latch and the output buffer state are retained until the output instruction to
operate the port 10 or 11 is executed or the RESET signal is input. Even though an input instruction is executed for
the port 10 or 11, the states of both the output latch and output buffer do not change.
The SPBL and RPBL instructions allow bit-by-bit setting and resetting of pins P100 to P103 and P110 to P113.
The input/output format of each of the ports 10 and 11 can be selected from among the N-ch open-drain input/
output, N-ch open-drain + pull-up resistor built-in input/output, and CMOS (push-pull) input/output by their
respective mask options.
When the CMOS (push-pull) input/output is selected, the port cannot return to the input mode once the output
instruction is executed. However, the states of the pins of the port can be checked by reading via the port input
instruction (IPL).
When one of the other two formats is selected, the port can enter the input mode to load the data on the 4-bit
line to the accumulator (as a quasi-bidirectional port) when the port receives high level output. Select each type of
the input/output format to meet the use of the port:
Œ CMOS input/output
i)
Uses all 4 bits of the port as input ports.
ii) Uses pins of the port as output pins not requiring middle withstand voltage output.
 N-ch open-drain input/output
i)
Uses pins of the port as I/O pins requiring a middle withstand voltage dielectric strength.
ii) Uses input pins of the port which also has output pins.
iii) Uses each pin of the port for both input and output by switching them over.
Ž N-ch open-drain + pull-up resistor built-in input/output
i)
Uses input pins of the port which also has output pins, that require a pull-up resistor.
ii) Uses each pin of the port for both input and output by switching them over. This requires a pull-up resistor.
Caution
Before using input pins in the case of  or Ž , write 1 in the output latch to turn the N-ch transistor
off.



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