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LTC1668I Datasheet(PDF) 1 Page - Linear Technology |
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LTC1668I Datasheet(HTML) 1 Page - Linear Technology |
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1 / 16 page ![]() 1 LTC1668 16-Bit, 50Msps DAC February 2000 s 50Msps Update Rate s 16-Bit Resolution s High Spectral Purity: 87dB SFDR at 1MHz fOUT s Differential Current Outputs s 30ns Settling Time s 5pV-s Glitch Impulse s Low Power: 180mW from ±5V Supplies s TTL/CMOS (3.3V or 5V) Inputs s Small Package: 28-Pin SSOP The LTC ®1668 is a 16-bit, 50Msps differential current output DAC implemented on a high performance BiCMOS process with laser trimmed, thin-film resistors. The com- bination of a novel current-steering architecture and a high performance process produces a DAC with excep- tional AC and DC performance. This is the first 16-bit DAC in the marketplace to exhibit an SFDR (spurious free dynamic range) of 87dB for an output signal frequency of 1MHz. Operating from ±5V supplies, the LTC1668 can be con- figured to provide full-scale output currents up to 10mA. The differential current outputs of the DAC allow single- ended or true differential operation. The –1V to 1V output compliance of the LTC1668 allows the outputs to be con- nected directly to external resistors to produce a differ- ential output voltage without degrading the converter’s linearity. Alternatively, the outputs can be connected to the summing junction of a high speed operational amplifier, or to a transformer. The LTC1668 is available in a 28-pin SSOP and is fully specified over the industrial temperature range. , LTC and LT are registered trademarks of Linear Technology Corporation. s Cellular Base Stations s Multicarrier Base Stations s Wireless Communication s Direct Digital Synthesis (DDS) s xDSL Modems s Arbitrary Waveform Generation s Automated Test Equipment s Instrumentation 16-Bit, 50Msps DAC Final Electrical Specifications Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. – + 16-BIT HIGH SPEED DAC 2.5V REFERENCE VSS VDD –5V CLOCK INPUT 16-BIT DATA INPUT LADCOM AGND DGND CLK DB15 DB0 1668 TA01 IOUT A 0.1 µF LTC1668 5V 52.3 Ω IREFIN REFOUT COMP1 COMP2 C2 0.1 µF 0.1 µF C1 0.1 µF RSET 2k IOUT B 52.3 Ω VOUT 1VP-P DIFFERENTIAL + – 0.1 µF FREQUENCY (1.25MHz/DIV) 0.05 –45 –25 –5 1668 G01 –65 –85 –55 –35 –15 –75 –95 –105 6.3 12.55 fCLOCK = 25Msps fOUT = 1.007MHz AMPLITUDE = 0dBFS = –8.5dBm SFDR = 86dBc Single Tone SFDR FEATURES DESCRIPTIO APPLICATIO S TYPICAL APPLICATIO |
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