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LTC1735CS-1 Datasheet(PDF) 22 Page - Linear Technology |
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LTC1735CS-1 Datasheet(HTML) 22 Page - Linear Technology |
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22 / 28 page  22 LTC1735-1 APPLICATIO S I FOR ATIO The next step is to calculate the ITH pin voltage, VITH, scale factor. The VITH scale factor reflects the ITH pin voltage required for a given load current in continuous inductor current operation. VITH controls the peak sense resistor voltage, which represents the DC output current plus one half of the peak-to-peak inductor current. The no load to full load VITH range is from 0.3V to 2.4V, which controls the sense resistor voltage from 0V to the ∆VSENSE(MAX) voltage of 75mV. For the circuit shown in Figure 8, the calculated VITH scale factor is: V Scale Factor V Range Sense sistor Value V VV V VA ITH ITH SENSE MAX = ∆ == •Re (. – . ) • . . ./ () 24 03 0003 0 075 0 084 Assuming continuous inductor current, VITH is: VI I V Scale Factor V Offset ITH OUTDC L ITH ITH =+ ∆ + 2 • At full load current: VA A VA V V ITH MAX PP () •. / . . =+ + = − 15 5 2 0 084 0 3 177 At minimum load current: VA A VA V V ITH MIN PP () .• . / . . =+ + = − 02 2 2 0 084 0 3 040 Notice that ∆IL,thepeak-to-peakinductorcurrent,changes from light load to full load. Increasing the DC inductor current decreases the permeability of the inductor core material, which decreases the inductance and increases ∆IL. The amount of inductance change is a function of the inductor design. If the circuit shown in Figure 8 sustained continuous in- ductor current operation, the error amplifier would control VITH from 0.40V at light load to 1.77V at full load, a 1.37V change. During Burst Mode operation, the LTC1735-1 output voltage is controlled by a comparator, not the error amplifier. Even though the error amplifier is not used in Burst Mode operation, it is necessary to assume linear operation for all error amplifier gain calculations. To create the ±30mV input offset error, the voltage gain of the error amplifier must be limited. The desired gain is: A V Input Offset Error V V V ITH = ∆ == 137 20 03 22 8 . (. ) . Connecting a resistor to the output of the transconductance error amplifier will limit the voltage gain. The value of this resistor is: R A Error Amplifier g ms k ITH V m == = 22 8 13 17 54 . . . To center the output voltage variation, VITH must be centered so that no ITH pin current flows when the output voltage is nominal. VITH(NOM) is the average voltage be- tween VITH at maximum output current and minimum output current: V VV V VV VV ITH NOM ITH MAX ITH MIN ITH MIN () () ( ) () – .– . .. =+ =+ = 2 177 0 40 2 0 40 1 085 The Thevenin equivalent of the gain limiting resistance value of 17.54k is made up of a resistor R5 that sources current into the ITH pin and resistor R1 that sinks current to SGND. To calculate the resistor values, first determine the ratio between them: k VV V VV V INTVCC ITH NOM ITH NOM == = – .– . . . () () 52 1085 1 085 379 VINTVCC is equal to VEXTVCC or 5.2V if EXTVCC is not used. Resistor R5 is: Rk R k k ITH 5 1 3 79 1 17 54 84 0 =+ = + = () • ( . ) • . . |
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