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LTC1772CS6 Datasheet(PDF) 10 Page - Linear Technology

Part # LTC1772CS6
Description  Constant Frequency Current Mode Step-Down DC/DC Controller in SOT-23
PDF  16 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1772CS6 Datasheet(HTML) 10 Page - Linear Technology

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10
LTC1772
APPLICATIONS INFORMATION
In the application, a 0.03
Ω resistor is used. For the
inductor, the required value is:
L
kHz
H
MIN =
−


+
+


=
42 25
550
0 0288
003
25 03
42 03
200
..
.
.
..
..
.
µ
In the application, a 5.6
µHinductorisusedtoreduceripple
current.
For the selection of the external MOSFET, the RDS(ON)
must be guaranteed at 2.5V since the LTC1772 has to work
down to 2.7V. Let’s assume that the MOSFET dissipation
is to be limited to PP = 250mW and its thermal resistance
is 50
°C/W. Hence the junction temperature at TA = 25°C
will be 37.5
°C and δp = 0.005 (37.5 – 25) = 0.0625. The
required RDS(ON) is then given by:
R
P
DC I
p
DS ON
P
OUT
()
.
≅
() +
()
=
2
1
011
δ
Ω
The P-channel MOSFET requirement can be met by an
Si6433DQ.
The requirement for the Schottky diode is the most strin-
gent when VOUT = 0V, i.e., short circuit. With a 0.03Ω
RSENSE resistor, the short-circuit current through the
Schottky is 0.1/0.03 = 3.3A. An MBRS340T3 Schottky
diode is chosen. With 3.3A flowing through, the diode is
rated with a forward voltage of 0.4V. Therefore, the worst-
case power dissipated by the diode is 1.32W. The addition
of DFB1 and DFB2 (Figure 5) will reduce the diode dissipa-
tion to approximately 0.66W.
The input capacitor requires an RMS current rating of at
least 0.75A at temperature, and COUT will require an ESR
of 0.1
Ω for optimum efficiency.
Foldback Current Limiting
As described in the Output Diode Selection, the worst-case
dissipation occurs with a short-circuited output when the
diode conducts the current limit value almost continu-
ously. To prevent excessive heating in the diode, foldback
current limiting can be added to reduce the current in
proportion to the severity of the fault.
Foldback current limiting is implemented by adding diodes
DFB1 and DFB2 between the output and the ITH/RUN pin as
shown in Figure 5. In a hard short (VOUT = 0V), the current
will be reduced to approximately 50% of the maximum
output current.
Figure 5. Foldback Current Limiting
VFB
ITH/RUN
VOUT
LTC1772
R1
1772 F05
R2
DFB1
DFB2
+
Design Example
Assume the LTC1772 is used in a single Lithium-Ion
battery-powered cellular phone application. The VIN will be
operating from a maximum of 4.2V down to a minimum of
2.7V. Load current requirement is a maximum of 1.5A but
most of the time it will be on standby mode, requiring only
2mA. Efficiency at both low and high load current is
important. Output voltage is 2.5V.
Maximum
VV
VV
OUT
D
IN MIN
D
Duty Cycle
=
+
+
=
()
%
93
From Figure 2, SF = 57%.
R
SF
I
SENSE
OUT
= ()( )( ) = ()( ) =
12
100
057
12 1 5
0 0317
.
.
.
Ω



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