LTC1772CS6 datasheet(11/16 Pages) LINER

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LTC1772

APPLICATIONS INFORMATION

Figure 6. LTC1772 Layout Diagram (See PC Board Layout Checklist)

PC Board Layout Checklist

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

LTC1772. These items are illustrated graphically in the

layout diagram in Figure 6. Check the following in your

layout:

1. Is the Schottky diode closely connected between ground

(Pin 2) and drain of the external MOSFET?

2. Does the (+) plate of CIN connect to the sense resistor

as closely as possible? This capacitor provides AC

current to the MOSFET.

3. Is the input decoupling capacitor (0.1

µF) connected

closely between VIN (Pin 5) and ground (Pin 2)?

4. Connect the end of RSENSE as close to VIN (Pin 5) as

possible. The VIN pin is the SENSE + of the current

comparator.

5. Is the trace from SENSE– (Pin 4) to the Sense resistor

kept short? Does the trace connect close to RSENSE?

6. Keep the switching node PGATE away from sensitive

small signal nodes.

7. Does the VFB pin connect directly to the feedback

resistors? The resistive divider R1 and R2 must be

connected between the (+) plate of COUT and signal

ground. The 100pF capacitor should be as close as

possible to the LTC1772.

BOLD LINES INDICATE HIGH CURRENT PATHS

VIN

VOUT

1772 F06

0.1

µF

COUT

CITH

RITH

CIN

ITH/RUN

LTC1772

GND

VFB

PGATE

VIN

SENSE–

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