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RT8238B Datasheet(PDF) 13 Page - Richtek Technology Corporation

Part # RT8238B
Description  Single Synchronous Buck PWM Controller
PDF  15 Pages
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Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT8238B Datasheet(HTML) 13 Page - Richtek Technology Corporation

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RT8238B
13
RT8238B-00 July 2015
www.richtek.com
©
Copyright 2015 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
where LIR is the ratio of peak-of-peak ripple current to the
maximum average inductor current. Find a low pass
inductor having the lowest possible DC resistance that
fits in the allowed dimensions. Ferrite cores are often the
best choice, although powdered iron is inexpensive and
can work well at 200kHz. The core must be large enough
and not to saturate at the peak inductor current (IPEAK) :
IR
PEAK
LOAD(MAX)
LOAD(MAX)
L
I
= I
+
I
2

 




Output Capacitor Selection
The output filter capacitor must have low enough Equivalent
Series Resistance (ESR) to meet output ripple and load-
transient requirements, yet have high enough ESR to
satisfy stability requirements. The output capacitance
must also be high enough to absorb the inductor energy
while transiting from full-load to no-load conditions without
tripping the overvoltage fault latch.
Although Mach ResponseTM DRVTM dual ramp valley mode
provides many advantages such as ease-of-use, minimum
external component configuration, and extremely short
response time, due to not employing an error amplifier in
the loop, a sufficient feedback signal needs to be provided
by an external circuit to reduce the jitter level. The required
SW
ESR
OUT
f
1
f
=
2 π ESR C
4

Do not put high value ceramic capacitors directly across
the outputs without taking precautions to ensure stability.
Large ceramic capacitors can have a high-ESR zero
frequency and cause erratic and unstable operation.
However, it is easy to add sufficient series resistance by
placing the capacitors a couple of inches downstream from
the inductor and connecting VOUT or FB divider close to
the inductor. There are two related but distinct ways
including double pulsing and feedback loop instability to
identify the unstable operation. Double pulsing occurs due
to noise on the output or because the ESR is too low that
there is not enough voltage ramp in the output voltage
signal. This “fools” the error comparator into triggering a
new cycle immediately after a 400ns minimum off-time
period has expired. Double pulsing is more annoying than
harmful, resulting in nothing worse than increased output
ripple. However, it may indicate the possible presence of
loop instability, which is caused by insufficient ESR. Loop
instability can result in oscillation at the output after line
or load perturbations that can trip the over voltage
protection latch or cause the output voltage to fall below
the tolerance limit. The easiest method for stability
checking is to apply a very zero-to-max load transient
and carefully observe the output voltage ripple envelope
for overshoot and ringing. It helps to simultaneously monitor
the inductor current with AC probe. Do not allow more
than one ringing cycle after the initial step-response under-
or over shoot.
OUT
REF
R1
V
= V
1+
R2

 

where VREF is 0.5V.(typ.)
Figure 4. Setting VOUT with a Resistor-Divider
Output Inductor Selection
The switching frequency (on-time) and operating point (%
ripple or LIR) determine the inductor value as follows :
ON
IN
OUT
IR
LOAD(MAX)
TV
V
L =
LI

R2 to be approximately 10k
Ω, and solve for R1 using the
equation :
signal level is approximately 15mV at the comparing point.
This generates VRipple = (VOUT / 0.75) x 15mV at the output
node. The output capacitor ESR should meet this
requirement.
Output Capacitor Stability
Stability is determined by the value of the ESR zero relative
to the switching frequency. The point of instability is given
by the following equation :
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
PHASE
LGATE
R1
R2
VOUT
VIN
UGATE
FB
GND



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