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SDA-2000 Datasheet(PDF) 6 Page - RF Micro Devices |
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SDA-2000 Datasheet(HTML) 6 Page - RF Micro Devices |
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6 / 8 page ![]() RF Micro Devices Inc. 7628 Thorndike Road, Greensboro, NC 27409-9421 DS140204 For sales or technical support, contact RFMD at +1.336.678.5570 or customerservice@rfmd.com. The information in this publication is believed to be accurate. However, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent rights of RFMD. RFMD reserves the right to change component circuitry, recommended application circuitry and specifications at any time without prior notice. 6 of 8 SDA-2000 Pin Names and Descriptions Pin Name Description Interface Schematic 1 RFIN RF Input. This pad is DC coupled and matched to 50 Ω from DC to 22GHz. 50 Ω microstrip transmission line on 0.127mm (5mil) thick alumina thin film substrate is recommended for RF input and output. A DC blocking capacitor is required for this connection. The calue of this capacitor will be based on the desired frequency range of application. 2 VG2 Each amplifier stage in the SDA-2000 is a cascade configuration. The gate of each upper FET in the cascade amplifiers is biased with the 3.5VDC (for VDD = 8V). The DC connection for the upper device gates runs across the length of the die. Pads 2 and 5 are both on this DC connection but are on opposite ends of the die. The VG2 connection can therefore be placed on either pad. A bypass capacitor is recommended on both ends, pads 2 and 5. 3 VTO The output drain termination pad. This pad requires a 1000pF bypass capacitor with the shortest wirebond length to prevent low frequency gain ripple. 4 RFOUT and VDD RF Output. 50 Ω microstrip transmission line on 0.127mm (5mil) thick alumina thin film substrate is recommended for RF input and output. Connect the DC bias (VDD) network to provide drain current (IDD). Note: Drain Bias (VDD) must be applied through a broadband bias tee or external bias network. 5 VCAS Each amplifier stage in the SDA-2000 is a cascade configuration. The gate of each upper FET in the cascade amplifiers is biased with the 3.5VDC (for VDD = 8V). The DC connection for the upper device gates runs across the length of the die. Pads 2 and 5 are both on this DC connection but are on opposite ends of the die. The VG2 connection can therefore be placed on either pad. A bypass capacitor is recommended on both ends, pads 2 and 5. 6 VG21 Not connected. 7 VTI Input gate voltage for the lower devices in the cascade amplifier. This pad also serves as the RF ground for the input termination resistor. The DC voltage applied to this pad will be between -2.0VDC (device is pinched OFF) to 0VDC (fully ON). The value of this capacitor will effect the low frequency response of the amplifier. Die GND Ground connection. Connect die bottom directly to ground plane for best performance. NOTE: The die should be connected directly to the ground plane with conductive epoxy. |
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