Optional Input Data Retiming

To eliminate pattern-dependent jitter in the input data,

connect a synchronous differential clock signal to the

CLK+ and CLK- inputs, and the RTEN control input

should be tied low. The input data is retimed on the ris-

ing edge of CLK+. If RTEN is tied high or left floating,

the retiming function is disabled and the input data is

directly connected to the output stage. Leave CLK+

and CLK- open when retiming is disabled.

Pulse-Width Control

The pulse-width control circuit can be used to minimize

pulse-width distortion. The differential voltage between

PWC+ and PWC- adjusts the pulse-width compensa-

tion. When PWC+ and PWC- are left open, the pulse-

width control circuit is automatically disabled.

Modulation Output Enable

The MAX3935 incorporates a modulation current

enable input. When MODEN is low, the modulation out-

put (MOD) is enabled. When MODEN is high or floating,

the output is disabled. In the disabled condition, the

modulation output sinks current to keep the EAM mod-

ule in the high-absorption state. The typical EAM

enable time is 2ns, and the typical disable time is 5ns.

Current Monitors

The MAX3935 features a bias-current monitor output

(BIASMON) and a modulation-current monitor output

7.5

Ω and 3Ω, respectively (±10%). Connect BIASMON

and MODMON to the inverting input of an op amp to

program the bias and modulation current (see Design

Procedure).

Design Procedure

Programming the Modulation Voltage

through the EAM impedance in parallel with the internal

75

Ω termination resistor.

To program the desired modulation current, connect

the inverting input of an op amp (see the Typical

Application Circuit) to MODMON and connect the out-

put to MODSET. Connect the positive op amp voltage

modulation current is set by connecting a reference

graph in the Typical Operating Characteristics to select

modulation current.

Programming the Bias Voltage

through the EAM impedance in parallel with the internal

75

Ω termination resistor.

To program the desired EAM bias current, connect the

inverting input of an op amp (see the Typical Application

Circuit) to BIASMON and connect the output to BIASSET.

Connect the positive op amp voltage supply to ground

noninverting input of the op amp. See the Bias Voltage

sponds to the required EAM bias voltage.

VI

Z

Z

BIAS

BIAS

EAM

EAM

≈×

×

+

75

75

Ω

Ω

I

V

MOD

MODREF

=

3

Ω

VI

Z

Z

MOD

MOD

EAM

EAM

≈×

×

+

75

75

Ω

Ω

10.7Gbps EAM Driver

8

_______________________________________________________________________________________

Figure 2. Required Input Signal, Setup/Hold-Time Definition

and Output Polarity

0.6V

TO 3.0V

TO 2.0V

TO 1.0V

TO 1.0V

VOUT

(DATA+) - (DATA-)

CLK+

CLK-

DATA-

DATA+