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SCG3040 Datasheet(PDF) 1 Page - Connor-Winfield Corporation |
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SCG3040 Datasheet(HTML) 1 Page - Connor-Winfield Corporation |
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1 / 12 page  Application The SCG3040 is designed for use as a reference input for OC-48 Framers and SERDES. It generates less than 1 psRMS jitter over the OC-48 bandwidth. SCG3040 is well suited for use in line cards, service termination cards and similar functions to provide reliable reference, phase locked, synchronization for TDM, PDH, SONET, and SDH network equipment. The SCG3040 provides a jitter filtered, wander following output signal synchronized to a superior Stratum or peer input reference signal. Features • 3.3V High Precision PLL • Two Differential LVPECL Outputs. 155.52 MHz or 77.76 MHz • 19.44 MHz CMOS Input Reference • Reference Duty Cycle Tolerant • Low Temperature Reflow Surface Mounting SCG3040 Synchronous Clock Generator PLL 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630- 851- 4722 Fax: 630- 851- 5040 www.conwin.com Bulletin SG033 Page 1 of 12 Revision P02 Date 22 NOV 04 Issued By MBatts |
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Similar Description - SCG3040 |
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